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TC4027BP Datasheet(PDF) 3 Page - Toshiba Semiconductor

Part No. TC4027BP
Description  Dual J-K Master-Slave Flip Flop
Download  9 Pages
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Maker  TOSHIBA [Toshiba Semiconductor]
Homepage  http://www.semicon.toshiba.co.jp/eng
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TC4027BP Datasheet(HTML) 3 Page - Toshiba Semiconductor

   
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TC4027BP/BF/BFN
2007-10-01
3
Operating Ranges (VSS = 0 V) (Note)
Characteristics
Symbol
Test Condition
Min
Typ.
Max
Unit
DC supply voltage
VDD
3
18
V
Input voltage
VIN
0
VDD
V
Note:
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VDD or VSS.
Static Electrical Characteristics (VSS = 0 V)
Test Condition
−40°C
25°C
85°C
Characteristics
Sym-
bol
VDD
(V)
Min
Max
Min
Typ.
Max
Min
Max
Unit
High-level output
voltage
VOH
⎪IOUT⎪ < 1 μA
VIN = VSS, VDD
5
10
15
4.95
9.95
14.95
4.95
9.95
14.95
5.00
10.00
15.00
4.95
9.95
14.95
V
Low-level output
voltage
VOL
⎪IOUT⎪ < 1 μA
VIN = VSS, VDD
5
10
15
0.05
0.05
0.05
0.00
0.00
0.00
0.05
0.05
0.05
0.05
0.05
0.05
V
VOH = 4.6 V
VOH = 2.5 V
VOH = 9.5 V
VOH = 13.5 V
5
5
10
15
−0.61
−2.50
−1.50
−4.00
−0.51
−2.10
−1.30
−3.40
−1.0
−4.0
−2.2
−9.0
−0.42
−1.70
−1.10
−2.80
Output high current
IOH
VIN = VSS, VDD
mA
VOL = 0.4 V
VOL = 0.5 V
VOL = 1.5 V
5
10
15
0.61
1.50
4.00
0.51
1.30
3.40
1.2
3.2
12.0
0.42
1.10
2.80
Output low current
IOL
VIN = VSS, VDD
mA
VOUT = 0.5 V, 4.5 V
VOUT = 1.0 V, 9.0 V
VOUT = 1.5 V, 13.5 V
5
10
15
3.5
7.0
11.0
3.5
7.0
11.0
2.75
5.50
8.25
3.5
7.0
11.0
Input high voltage
VIH
⎪IOUT⎪ < 1 μA
V
VOUT = 0.5 V, 4.5 V
VOUT = 1.0 V, 9.0 V
VOUT = 1.5 V, 13.5 V
5
10
15
1.5
3.0
4.0
2.25
4.50
6.75
1.5
3.0
4.0
1.5
3.0
4.0
Input low voltage
VIL
⎪IOUT⎪ < 1 μA
V
“H” level
IIH
VIH = 18 V
18
0.1
10
5
0.1
1.0
Input
current
“L” level
IIL
VIL = 0 V
18
−0.1
−10−5
−0.1
−1.0
μA
Quiescent supply
current
IDD
VIN = VSS, VDD
(Note)
5
10
15
1
2
4
0.002
0.004
0.008
1
2
4
30
60
120
μA
Note: All valid input combinations.


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