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TC75S54FE Datasheet(PDF) 2 Page - Toshiba Semiconductor |
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TC75S54FE Datasheet(HTML) 2 Page - Toshiba Semiconductor |
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2 / 11 page  TC75S54F/FU/FE 2007-11-01 2 Marking (top view) Pin Connection (top view) Electrical Characteristics DC Characteristics (VDD = 3.0 V, VSS = GND, Ta = 25°C) Characteristics Symbol Test Circuit Test Condition Min Typ. Max Unit Input offset voltage VIO 1 RS = 1 kΩ ⎯ 2 10 mV Input offset current IIO ⎯ ⎯ ⎯ 1 ⎯ pA Input bias current II ⎯ ⎯ ⎯ 1 ⎯ pA Common mode input voltage CMVIN 2 ⎯ 0.0 ⎯ 2.1 V Voltage gain(open loop) GV ⎯ ⎯ 60 70 ⎯ dB VOH 3 RL >= 100 kΩ 2.9 ⎯ ⎯ Maximum output voltage VOL 4 RL >= 100 kΩ ⎯ ⎯ 0.1 V Common mode input signal rejection ratio CMRR 2 VIN = 0.0~2.1 V 60 70 ⎯ dB Supply voltage rejection ratio SVRR 1 VDD = 1.8~7.0 V 60 70 ⎯ dB Supply current IDD 5 ⎯ ⎯ 100 200 μA Source current Isource 6 ⎯ 100 200 ⎯ μA Sink current Isink 7 ⎯ 200 700 ⎯ μA DC Characteristics (VDD = 1.8 V, VSS = GND, Ta = 25°C) Characteristics Symbol Test Circuit Test Condition Min Typ. Max Unit Input offset voltage VIO 1 RS = 10 kΩ ⎯ 2 10 mV Input offset current IIO ⎯ ⎯ ⎯ 1 ⎯ pA Input bias current II ⎯ ⎯ ⎯ 1 ⎯ pA Common mode input voltage CMVIN 2 ⎯ 0.2 ⎯ 0.9 V Voltage gain (open loop) GV ⎯ ⎯ 60 70 ⎯ dB VOH 3 RL >= 100 kΩ 1.7 ⎯ ⎯ Maximum output voltage VOL 4 RL >= 100 kΩ ⎯ ⎯ 0.1 V Supply current IDD 5 ⎯ ⎯ 80 160 μA Source current Isource 6 ⎯ 80 160 ⎯ μA Sink current Isink 7 ⎯ 200 600 ⎯ μA VDD 5 IN ( −) 4 1 3 VSS 2 OUT IN ( +) S E 4 5 3 1 2 |
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