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TC74VHC174F Datasheet(PDF) 1 Page - Toshiba Semiconductor |
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TC74VHC174F Datasheet(HTML) 1 Page - Toshiba Semiconductor |
1 / 10 page TC74VHC174F/FN/FT 2007-10-01 1 TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHC174F,TC74VHC174FN,TC74VHC174FT Hex D-Type Flip Flop with Clear The TC74VHC174 is an advanced high speed CMOS HEX D-TYPE FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. Information signals applied to D inputs are transferred to the Q output on the positive going edge of the clock pulse. When the CLR input is held low, the Q output are in the low logic level independent of the other inputs. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages. Features • High speed: fmax = 150 MHz (typ.) at VCC = 5 V • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C • High noise immunity: VNIH = VNIL = 28% VCC (min) • Power down protection is provided on all inputs. • Balanced propagation delays: tpLH ∼− tpHL • Wide operating voltage range: VCC (opr) = 2 to 5.5 V • Low noise: VOLP = 0.8 V (max) • Pin and function compatible with 74ALS174 Note: xxxFN (JEDEC SOP) is not available in Japan. TC74VHC174F TC74VHC174FN TC74VHC174FT Weight SOP16-P-300-1.27A : 0.18 g (typ.) SOL16-P-150-1.27 : 0.13 g (typ.) TSSOP16-P-0044-0.65A : 0.06 g (typ.) |
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