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TC74VCX16843FT Datasheet(PDF) 1 Page - Toshiba Semiconductor |
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TC74VCX16843FT Datasheet(HTML) 1 Page - Toshiba Semiconductor |
1 / 12 page TC74VCX16843FT 2007-10-19 1 TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VCX16843FT Low-Voltage 18-Bit D-Type Latch with 3.6-V Tolerant Inputs and Outputs The TC74VCX16843FT is a high-performance CMOS 18-bit D-type latch. Designed for use in 1.8-V, 2.5-V or 3.3-V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. It is also designed with overvoltage tolerant inputs and outputs up to 3.6 V. The TC74VCX16843FT can be used as two 9-bit latches or one 18-bit latch. The 18 latches are transparent D-type latches. The device has noninverting data (D) inputs and provides true data at its outputs. While the latch-enable (1LE or 2LE) input is high, the Q outputs of the corresponding 9-bit latch follow the D inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs. CLR and PR are independent of the LE and are accomplished by setting the appropriate input low. When the OE input is high, the outputs are in a high-impedance state. This device is designed to be used with 3-state memory address drivers, etc. All inputs are equipped with protection circuits against static discharge. Features • Low-voltage operation: VCC = 1.8 to 3.6 V • High-speed operation : tpd = 3.0 ns (max) (VCC = 3.0 to 3.6 V) : tpd = 3.7 ns (max) (VCC = 2.3 to 2.7 V) : tpd = 7.4 ns (max) (VCC = 1.8 V) • Output current: IOH/IOL = ±24 mA (min) (VCC = 3.0 V) : IOH/IOL = ±18 mA (min) (VCC = 2.3 V) : IOH/IOL = ±6 mA (min) (VCC = 1.8 V) • Latch-up performance: −300 mA • ESD performance: Machine model ≥ ±200 V Human body model ≥ ±2000 V • Package: TSSOP • 3.6-V tolerant function and power-down protection provided on all inputs and outputs Weight: 0.25 g (typ.) |
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