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TC74LVX573F Datasheet(PDF) 5 Page - Toshiba Semiconductor |
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TC74LVX573F Datasheet(HTML) 5 Page - Toshiba Semiconductor |
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5 / 9 page  TC74LVX573F/FT 2007-10-17 5 AC Characteristics (input: tr = tf = 3 ns) Ta = 25°C Ta = −40 to 85°C Characteristics Symbol Test Condition VCC (V) CL (pF) Min Typ. Max Min Max Unit 15 ⎯ 8.2 15.6 1.0 18.5 tpLH 2.7 50 ⎯ 10.7 19.1 1.0 22.0 15 ⎯ 6.4 10.1 1.0 12.0 Propagation delay time (LE-Q) tpHL ⎯ 3.3 ± 0.3 50 ⎯ 8.9 13.6 1.0 15.5 ns 15 ⎯ 7.6 14.5 1.0 17.5 tpLH 2.7 50 ⎯ 10.1 18.0 1.0 21.0 15 ⎯ 5.9 9.3 1.0 11.0 Propagation delay time (D-Q) tpHL ⎯ 3.3 ± 0.3 50 ⎯ 8.4 12.8 1.0 14.5 ns 15 ⎯ 7.8 15.0 1.0 18.5 tpZL 2.7 50 ⎯ 10.3 18.5 1.0 22.0 15 ⎯ 6.1 9.7 1.0 12.0 Output enable time tpZH RL = 1 kΩ 3.3 ± 0.3 50 ⎯ 8.6 13.2 1.0 15.5 ns tpLZ 2.7 50 ⎯ 12.1 19.1 1.0 22.0 Output disable time tpHZ RL = 1 kΩ 3.3 ± 0.3 50 ⎯ 10.1 13.6 1.0 15.5 ns 2.7 50 ⎯ ⎯ 1.5 ⎯ 1.5 Output to output skew tosLH tosHL (Note 1) 3.3 ± 0.3 50 ⎯ ⎯ 1.5 ⎯ 1.5 ns Input capacitance CIN (Note 2) ⎯ 4 10 ⎯ 10 pF Output capacitance COUT ⎯ ⎯ 6 ― ⎯ ⎯ pF Power dissipation capacitance CPD (Note 3) ⎯ 29 ― ⎯ ⎯ pF Note 1: Parameter guaranteed by design. (tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn|) Note 2: Parameter guaranteed by design. Note 3: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption. Average operating current can be obtained by the equation: ICC (opr) = CPD･VCC･fIN + ICC/8 (per latch) And the total CPD when n pcs. of Latch operate can be gained by the following equation: CPD (total) = 21 + 8･n |
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