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TB62726AN Datasheet(PDF) 7 Page - Toshiba Semiconductor |
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TB62726AN Datasheet(HTML) 7 Page - Toshiba Semiconductor |
7 / 18 page TB62726AN/AF 2006-06-14 7 Switching Characteristics (Topr = 25°C unless otherwise specifed) Characteristics Symbol Conditions Min Typ. Max Unit tpLH1 CLK- OUTn , LATCH = “H”, ENABLE = “L” ⎯ 150 300 tpLH2 LATCH - OUTn , ENABLE = “L” ⎯ 140 300 tpLH3 ENABLE - OUTn , LATCH = “H” ⎯ 140 300 tpLH CLK-SERIAL OUT 3 6 ⎯ tpHL1 CLK- OUTn , LATCH = “H”, ENABLE = “L” ⎯ 170 340 tpHL2 LATCH - OUTn , ENABLE = “L” ⎯ 170 340 tpHL3 ENABLE - OUTn , LATCH = “H” ⎯ 170 340 Propagation delay tpLH CLK-SERIAL OUT 4 7 ⎯ ns Output rise time tor 10~90% of voltage waveform 40 85 150 ns Output fall time tof 90~10% of voltage waveform 40 70 150 ns Maximum CLOCK rise time tr ⎯ ⎯ 5 µs Maximum CLOCK fall time tf When not on PCB (Note 5) ⎯ ⎯ 5 µs Conditions: (Refer to test circuit.) Topr = 25°C, VDD = VIH = 3.3 V and 5 V, VOUT = 0.7 V, VIL = 0 V, REXT = 490 Ω, VL = 3.0 V, RL = 60 Ω, CL = 10.5 pF Note 5: If the device is connected in a cascade and tr/tf for the waveform is large, it may not be possible to achieve the timing required for data transfer. Please consider the timings carefully. Test Circuit Logic input waveform VDD = VIH = 3.3 V VIL = 0 V tr = tf = 10 ns (10% to 90%) GND SERIAL-IN LATCH CLOCK OUT0 VDD R-EXT SERIAL-OUT ENABLE OUT15 Function generator IOL VIH, VIL Iref CL VL RL CL IDD |
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