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TB1311AFG Datasheet(PDF) 38 Page - Toshiba Semiconductor |
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TB1311AFG Datasheet(HTML) 38 Page - Toshiba Semiconductor |
38 / 46 page TB1311AFG 2006-05-29 38 Synchronization Block (Test Condition: A-SYNC = 1 (ON)) Characteristic Symbol Test Conditions Min Typ Max Unit Vsep100 HV-SEP = 00, Note A, Note C 12 18 24 Vsep101 HV-SEP = 01, Note A, Note C 20 26 32 Vsep110 HV-SEP = 10, Note A, Note C 26 31 38 525/60i Vsep111 HV-SEP = 11, Note A, Note C 38 43 50 % Vsep200 HV-SEP = 00, Note A, Note C 20 25 30 Vsep201 HV-SEP = 01, Note A, Note C 28 33 38 Vsep210 HV-SEP = 10, Note A, Note C 33 38 43 1125/60i Vsep211 HV-SEP = 11, Note A, Note C 45 50 55 % Vsep300 HV-SEP = 00, Note A, Note C 14 20 26 Vsep301 HV-SEP = 01, Note A, Note C 21 27 33 Vsep310 HV-SEP = 10, Note A, Note C 27 33 39 H/V-sync separation level SVGA/60 Vsep311 HV-SEP = 11, Note A, Note C 38 44 50 % Threshold amplitude for HD input VthHD HV OUT = 1 0.8 ⎯ ⎯ Vp-p Threshold amplitude for VD input VthVDn HV OUT = 1 0.9 ⎯ ⎯ Vp-p VhdH High level 1.0 1.2 1.4 HD-OUT voltage VhdL Low level ⎯ 0.1 0.4 V Thdw0 HD WIDTH = 0 1.6 1.7 1.8 HD-OUT width Thdw1 HD WIDTH = 1 0.6 0.7 0.8 µs H sync-in to HD-out Thdp1 HV OUT = 0, 1125/60p input, Note D 70 90 110 ns HD-OUT phase HD-in to HD-out Thdp2 HV OUT = 1, Note A 25 34 40 ns VvdH High level 1.0 1.2 1.4 VD-OUT voltage VvdL Low level ⎯ 0.1 0.4 V Sync sep Tvdws Separated VD-OUT ⎯ 290 ⎯ µs 1250i ODD Tvdwodd ⎯ 285 ⎯ 1250i EVEN Tvdweven When 1250i input ⎯ 270 ⎯ µs Free-run 1 Tvdwfi Free-run VD-OUT in interlace mode ⎯ 4 ⎯ VD-OUT width Free-run 2 Tvdwfp Free-run VD-OUT in progressive mode ⎯ 8 ⎯ H V sync-in to VD-out Tvdp Except 1250/50i input, Note D 0.15 0.20 0.25 H H sync-in to VD-out Tvdp1250 1250/50i input, H sync-in to VD-out, Note D 310 320 330 ns VD-OUT phase VD-in to VD-out Tvdphv HV OUT = 1, Note A 25 34 40 ns Note C: 286 mVp-p sync input for 525/60i, 0.3 Vp-p sync input for 1125/60i and SVGA/60. Note D: See the figures below. |
Similar Part No. - TB1311AFG_06 |
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Similar Description - TB1311AFG_06 |
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