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TC74HC40105AP Datasheet(PDF) 6 Page - Toshiba Semiconductor |
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TC74HC40105AP Datasheet(HTML) 6 Page - Toshiba Semiconductor |
6 / 11 page TC74HC40105AP/AF 2007-10-01 6 Timing Requirements (input: tr = tf = 6 ns) Test Condition Ta = 25°C Ta = −40 to 85°C Characteristics Symbol VCC (V) Typ. Limit Limit Unit Minimum pulse width (SI) tW (L) tW (H) ⎯ 2.0 4.5 6.0 ⎯ ⎯ ⎯ 75 15 13 95 19 16 ns Minimum pulse width ( SO ) tW (L) tW (H) ⎯ 2.0 4.5 6.0 ⎯ ⎯ ⎯ 75 15 13 95 19 16 ns Minimum pulse width (MR) tW (L) tW (H) ⎯ 2.0 4.5 6.0 ⎯ ⎯ ⎯ 75 15 13 95 19 16 ns Minimum set-up time (DATA-SI) ts ⎯ 2.0 4.5 6.0 ⎯ ⎯ ⎯ 0 0 0 0 0 0 ns Minimum hold time (DATA-SI) th ⎯ 2.0 4.5 6.0 ⎯ ⎯ ⎯ 100 20 17 125 25 21 ns Minimum removal time (MR-SI) trem ⎯ 2.0 4.5 6.0 ⎯ ⎯ ⎯ 50 10 9 65 13 11 ns Clock frequency f ⎯ 2.0 4.5 6.0 ⎯ ⎯ ⎯ 3 15 18 2.4 12 13 MHz AC Characteristics (CL = 15 pF, VCC = 5 V, Ta = 25°C, input: tr = tf = 6 ns) Characteristics Symbol Test Condition Min Typ. Max Unit Output transition time (DIR, DOR) tTLH tTHL ⎯ ⎯ 4 8 ns Propagation delay time ( SO , MR-DOR) tpHL ⎯ ⎯ 22 39 ns Propagation delay time ( SO -DIR) tpLH ⎯ ⎯ 242 365 ns Propagation delay time (SI-DOR) tpLH ⎯ ⎯ 187 300 ns Propagation delay time (SI-DIR) tpHL ⎯ ⎯ 22 35 ns Propagation delay time (MR-DIR) tpLH tpHL ⎯ ⎯ 25 39 ns |
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