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TC74HC107AF Datasheet(PDF) 2 Page - Toshiba Semiconductor

Part No. TC74HC107AF
Description  CMOS Digital Integrated Circuit Silicon Monolithic Dual J-K Flip Flop with Clear
Download  9 Pages
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Maker  TOSHIBA [Toshiba Semiconductor]
Homepage  http://www.semicon.toshiba.co.jp/eng
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TC74HC107AF Datasheet(HTML) 2 Page - Toshiba Semiconductor

   
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TC74HC107AP/AF/AFN
2007-10-01
2
Truth Table
Inputs
Outputs
CLR
J
K
CK
Q
Q
Function
L
X
X
X
L
H
Clear
H
L
L
Qn
n
Q
No Change
H
L
H
L
H
H
H
L
H
L
H
H
H
n
Q
Qn
Toggle
H
X
X
Qn
n
Q
No Change
X: Don’t care
System Diagram
Absolute Maximum Ratings (Note 1)
Characteristics
Symbol
Rating
Unit
Supply voltage range
VCC
−0.5~7
V
DC input voltage
VIN
−0.5~VCC + 0.5
V
DC output voltage
VOUT
−0.5~VCC + 0.5
V
Input diode current
IIK
±20
mA
Output diode current
IOK
±20
mA
DC output current
IOUT
±25
mA
DC VCC/ground current
ICC
±50
mA
Power dissipation
PD
500 (DIP) (Note 2)/180 (SOP)
mW
Storage temperature
Tstg
−65~150
°C
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 2: 500 mW in the range of Ta
= −40°C~65°C. From Ta = 65°C to 85°C a derating factor of −10 mW/°C shall be
applied until 300 mW.


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