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TC74HC112AP Datasheet(PDF) 6 Page - Toshiba Semiconductor

Part No. TC74HC112AP
Description  Dual J-K Flip Flop with Preset and Clear
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Maker  TOSHIBA [Toshiba Semiconductor]
Homepage  http://www.semicon.toshiba.co.jp/eng
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TC74HC112AP Datasheet(HTML) 6 Page - Toshiba Semiconductor

 
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TC74HC112AP/AF/AFN
2007-10-01
6
AC Characteristics (CL = 50 pF, input: tr = tf = 6 ns)
Test Condition
Ta
= 25°C
Ta
= −40 to 85°C
Characteristics
Symbol
VCC
(V)
Min
Typ.
Max
Min
Max
Unit
Output transition time
tTLH
tTHL
2.0
4.5
6.0
30
8
7
75
15
13
95
19
16
ns
Propagation delay
time
(
CK -Q, Q )
tpLH
tpHL
2.0
4.5
6.0
52
16
14
125
25
21
155
31
26
ns
Propagation delay
time
( CLR , PR -Q, Q)
tpLH
tpHL
2.0
4.5
6.0
68
17
15
135
27
23
170
34
29
ns
Maximum clock
frequency
fmax
2.0
4.5
6.0
6
30
34
19
63
71
4
24
28
MHz
Input capacitance
CIN
5
10
10
pF
Power dissipation
capacitance
CPD
(Note)
35
pF
Note:
CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD・VCC・fIN + ICC/2 (per F/F)


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