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TC74ACT112P Datasheet(PDF) 5 Page - Toshiba Semiconductor

Part No. TC74ACT112P
Description  CMOS Digital Integrated Circuit Silicon Monolithic Dual J-K Flip Flop with Preset and Clear
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Maker  TOSHIBA [Toshiba Semiconductor]
Homepage  http://www.semicon.toshiba.co.jp/eng
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TC74ACT112P Datasheet(HTML) 5 Page - Toshiba Semiconductor

   
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TC74ACT112P/F/FN
2007-10-01
5
AC Characteristics (CL = 50 pF, RL = 500 Ω, input: tr = tf = 3 ns)
Test Condition
Ta
= 25°C
Ta
= −40 to
85°C
Characteristics
Symbol
VCC (V)
Min
Typ.
Max
Min
Max
Unit
Propagation delay
time
( CK -Q, Q)
tpLH
tpHL
5.0
± 0.5
6.4
10.0
1.0
11.5
ns
Propagation delay
time
(
CLR , PR -Q, Q )
tpLH
tpHL
5.0
± 0.5
6.8
10.5
1.0
12.0
ns
Maximum clock
frequency
fmax
5.0
± 0.5
85
100
85
MHz
Input capacitance
CIN
5
10
10
pF
Power dissipation
capacitance
CPD
(Note)
32
pF
Note:
CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD・VCC・fIN + ICC/2 (per F/F)


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