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TC74AC573FT Datasheet(PDF) 1 Page - Toshiba Semiconductor |
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TC74AC573FT Datasheet(HTML) 1 Page - Toshiba Semiconductor |
1 / 9 page TC74AC573P/F/FT 2007-10-01 1 TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74AC573P,TC74AC573F,TC74AC573FT Octal D-Type Latch with 3-State Output The TC74AC573 is an advanced high speed CMOS OCTAL LATCH fabricated with silicon gate and double-layer metal wiring C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. These 8-bit D-type latches are controlled by a latch enable input (LE) and a output enable input ( OE ). When the OE input is high, the eight outputs are in a high impedance state. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features • High speed: tpd = 6.0 ns (typ.) at VCC = 5 V • Low power dissipation: ICC = 8 μA (max) at Ta = 25°C • High noise immunity: VNIH = VNIL = 28% VCC (min) • Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 Ω transmission lines. • Balanced propagation delays: tpLH ∼− tpHL • Wide operating voltage range: VCC (opr) = 2 to 5.5 V • Pin and function compatible with 74F573 TC74AC573P TC74AC573F TC74AC573FT Weight DIP20-P-300-2.54A : 1.30 g (typ.) SOP20-P-300-1.27A : 0.22 g (typ.) TSSOP20-P-0044-0.65A : 0.08 g (typ.) |
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