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TC74AC10P Datasheet(PDF) 1 Page - Toshiba Semiconductor |
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TC74AC10P Datasheet(HTML) 1 Page - Toshiba Semiconductor |
1 / 8 page TC74AC10P/F/FN 2007-10-01 1 TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74AC10P,TC74AC10F,TC74AC10FN Triple 3-Input NAND Gate The TC74AC10 is an advanced high speed CMOS 3-INPUT NAND GATE fabricated with silicon gate and double-layer metal wiring C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features • High speed: tpd = 5.0 ns (typ.) at VCC = 5 V • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C • High noise immunity: VNIH = VNIL = 28% VCC (min) • Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 Ω transmission lines. • Balanced propagation delays: tpLH ∼− tpHL • Wide operating voltage range: VCC (opr) = 2 to 5.5 V • Pin and function compatible with 74F10 Pin Assignment Note: xxxFN (JEDEC SOP) is not available in Japan. TC74AC10P TC74AC10F TC74AC10FN Weight DIP14-P-300-2.54 : 0.96 g (typ.) SOP14-P-300-1.27A : 0.18 g (typ.) SOL14-P-150-1.27 : 0.12 g (typ.) |
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