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TC9WMB2AFK Datasheet(PDF) 10 Page - Toshiba Semiconductor |
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TC9WMB2AFK Datasheet(HTML) 10 Page - Toshiba Semiconductor |
10 / 18 page TC9WMB1AFK/FU,TC9WMB2AFK/FU 2007-10-19 10 (c) If a stop condition is issued while data is read (device address, R/W, address, and data), the device enters the standby state. (A stop condition is accepted even during data transfer.) (A current address read is given below as an example. This is the same as the other read modes. ) (d) If a start condition is issued while data is read, the SDA pin changes from output to input mode and the device is ready to accept the next instruction. (6) Software reset The device cannot be reset externally because it does not incorporate a RESET pin. Instead, the device is reset by software. The software resets the device to the same state using the power-on clear circuit. The address counter returns to the first address 00H and the SDA pin goes to the high-impedance state (standby state). The software reset is invoked when a start condition is generated followed by nine SCL clock pulses (dummy cycles). While a dummy cycle is inserted, the SDA line must be pulled high. This reset operation stops an acknowledge output and data transfer. The reset is completed by generating another start condition. Issue a stop condition before starting a new transfer. Start conditions of five times or more cannot be generated from stop condition to the next stop condition. Incremented. Start Device address R/W ACK Data NACK Stop Read instruction Address counter is not incremented during this period. SCL SDA 1 28 9 Stop condition Start condition Dummy cycles Start condition Figure 13 Software reset |
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Similar Description - TC9WMB2AFK |
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