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PN531 Datasheet(PDF) 9 Page - NXP Semiconductors |
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PN531 Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 19 page Philips Semiconductors Objective Short Form Specification Rev. 2.0 February 2004 PN531 µC based Transmission module Pin Symbol Type Pad Ref Voltage Description this signal is used as test signal input. 25 SVDD PWR Connected to SAM power supply; used as a reference for communication with the SAM. 26 P31 IO PVDD General purpose IO signal. Can be configured to act either as TX line of the second serial interface or general purpose IO. In test mode this signal is used as input and output test signal. 27 P30 IO PVDD General purpose IO signal. Can be configured to act either as RX line of the second serial interface or general purpose IO. In test mode this signal is used as input and output test signal. 28 IRQ O PVDD Interrupt request: Output to signal an interrupt event to the host (Port 7 bit 0) 29 RSTOUT IO PVDD Output reset signal. When Low it indicates that the circuit is in reset state. 30 DELATT O PVDD Optional output for an external 1.5 KOhms resistor connection on D+. 31 NSS IO PVDD Not Slave Select. In test mode this signal is used as input and output test signal. 32 MOSI IO PVDD Master Out Slave In. In test mode this signal is used as input and output test signal 33 MISO IO PVDD Master In Slave Out. In test mode this signal is used as input and output test signal 34 SCK IO PVDD Serial interface clock. In test mode this signal is used as input and output test signal 35 PVDD PWR Pad power supply 36 P33_INT1 IO PVDD General purpose IO signal. Can be used to generate an HZ state on the output of the selected interface for the Host communication and to enter TAMA into power down mode without resetting the internal state of TAMA. In test mode this signal is used as input and output test signal. 37 P32_INT0 IO PVDD General purpose IO signal. Can also be used as an interrupt source In test mode this signal is used as input and output test signal. 38 RSTPD I PVDD Reset and Power Down: When High, internal current sources are switched off, the oscillator is inhibited, and the input pads are disconnected from the outside world. With a positive edge on this pin the internal reset phase starts. 39 DVDD PWR Digital Power Supply 40 VBUS PWR USB power supply. 9 |
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