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TMP88CP34FG Datasheet(PDF) 73 Page - Toshiba Semiconductor |
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TMP88CP34FG Datasheet(HTML) 73 Page - Toshiba Semiconductor |
73 / 215 page TMP88CS34/CP34 2007-09-12 88CS34-73 (3) Window mode In this mode, counting up performed on the rising edge of an internal clock during TC2 external pin input (window pulse) is “H” level. The contents of TC2DR are compared with the contents of up-counter. If a match found, an INTTC2 interrupt is generated, and the up-counter is cleared. The maximum applied frequency (TC2 input) must be considerably slower than the selected internal clock. Example: Generates an interrupt, inputting “H” level pulse width of 120 ms or more. (at fc = 16.0 MHz, DV1CK = 1) LDW (TC2DR), 0075H ; Sets TC2DR (120 ms ÷ 214/fc = 0075H) DI SET (EIRH). 6 ; Enables INTTC2 interrupt EI LD (TC2CR), 00000101B ; Selects TC2 source clock LD (TC2CR), 00100101B ; Starts TC2 Figure 2.6.5 Window Mode Timing Chart 12 n − 31 2 3 n TC2DR INTTC2 interrupt Internal clock Up-counter 0 n Match detect Counter clear TC2 pin input n − 2 n − 1 0 |
Similar Part No. - TMP88CP34FG |
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Similar Description - TMP88CP34FG |
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