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TMP88CH41UG Datasheet(PDF) 53 Page - Toshiba Semiconductor |
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TMP88CH41UG Datasheet(HTML) 53 Page - Toshiba Semiconductor |
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53 / 186 page  Page 43 TMP88CH41UG 5.4 Port P4 (P47 to P40) Port P4 is an 8-bit input/output port shared with serial interface input/output. This port is switched between input and output modes using the P4 port input/output control register (P4CR). When reset, the P4CR register is initialized to 0, with the P4 port set for input mode. Also, the output latch (P4DR) is initialized to 0 when reset. The P4 port contains bitwise programmable open-drain control. The P4 port open-drain control register (P4ODE) is used to select open-drain or tri-state mode for the port. When reset, the P4ODE register is initialized to 0, with tri- state mode selected for the port. Figure 5-5 Port P4 Note 1: Even when open-drain mode is selected, the protective diode remains connected. Therefore, do not apply voltages exceeding VDD. Note 2: Read-modify-write (RMW) operation executes at open-drain mode is selected, read out the output latch states. When any other instruction is executed, external pin states is read out. Note 3: When using the CTC 16-bit timer (CTC) as an ordinary timer, set P47 (CTC) for output mode. P4 Port Input/Output Registers P4DR (00004H) 7 6 5 432 10 P47 CTC P46 PPG2 P45 SO TXD1 P44 SI RXD1 P43 SCK P42 PDU1 P41 PDV1 P40 PDW1 (Initial value: 0000 0000) P4CR (01F8AH) 7 6 5 432 10 (Initial value: 0000 0000) P4CR P4 port input/output control (Specify bitwise) 0: Input mode 1: Output mode R/W P4ODE (01F84H) 7 6 5 432 10 (Initial value: 0000 0000) P4ODE P4 port open-drain control (Specify bitwise) 0: Tri-state 1: Open drain R/W Output latch P4CRi Data output Control input values External input CR Control input Control output Data input P4i Note:i=7 to 0 D Q 1 0 1 0 0 0 0 1 |
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