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TMP93CS40 Datasheet(PDF) 85 Page - Toshiba Semiconductor |
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TMP93CS40 Datasheet(HTML) 85 Page - Toshiba Semiconductor |
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85 / 248 page  TMP93CS40/TMP93CS41 2004-02-10 93CS40-83 Port 9 Register 7 6 5 4 3 2 1 0 P9 Bit symbol P97 P96 P95 P94 P93 P92 P91 P90 (0019H) Read/Write R/W After reset Output mode Input mode Function 1 1 1 1 1 1 1 1 Port 9 Control Register 7 6 5 4 3 2 1 0 P9CR Bit symbol P97C P96C P95C P94C P93C P92C P91C P90C (001BH) Read/Write W After reset 1 1 0 0 0 0 0 0 Function 0: Input 1: Output Port 9 Function Register 7 6 5 4 3 2 1 0 P9FC Bit symbol P95F P93F P92F P90F (001DH) Read/Write W W W W After reset 0 0 0 0 Function 0: Port 1: SCLK1 0: Port 1: TXD1 0: Port 1: SCLK0 0: Port 1: TXD0 Figure 3.5.26 Registers for Port 9 Port 9 I/O setting 0 Input 1 Output Note: Port 96 and 97’s output buffer is an open-drain output type. Note 1: Read-modify-write is prohibited for registers P9CR and P9FC. Note 2: When port P9 is used in the input mode, the P9 register controls the built-in pull-up resistor. Read-modify-write is prohibited in the input mode or the I/O mode, as it may affect the states of the pull-up/pull-down resistors. Note 3: When the TXD pin is set to be an open-drain output type, set 1 to bit0 (for TXD0 pin) or bit1 (for TXD1 pin) of the ODE register. The P91/RXD0 and P94/RXD1 pins do not have a register changing them from port to function. For example, when they are used as an input port, the incoming signal is input to the SIO as serial receiving data. Note 4: Notes on using low-frequency oscillation circuit. To connect a low-frequency resonator to ports 96 and 97, it is necessary to set the following procedures to reduce the consumption of power. (Connecting to a resonator) Set P9CR<P96C, P97C> = “11”, P9<P96:97> = “00” (Connecting to an oscillator) Set P9CR<P96C, P97C> = “11”, P9<P96:97> = “10” Note5: When ports 96 and 97 is used in the output mode, input gate in operation. Set output to “L” or attach pull-up on pin to reduce the consumption of power, before the HALT instruction is executed. P9FC<P90F> 1 P9CR<P90C> 1 P9FC<P92F> 1 P9CR<P92C> 1 P90 TXD0 output setting (Note 3) P92 SCLK0 output setting P9FC<P93F> 1 P9CR<P93C> 1 P93 TXD1 output setting (Note 3) P9FC<P95F> 1 P9CR<P95C> 1 P95 SCLK1 output setting |
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