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TMP92CD54I Datasheet(PDF) 43 Page - Toshiba Semiconductor |
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TMP92CD54I Datasheet(HTML) 43 Page - Toshiba Semiconductor |
43 / 343 page 2006-01-27 92CD54I-43 TMP92CD54I Example of register setting: To set WUINT0 with rising edge and set interrupt level 3, set the registers as follows: DI ; Disable interrupt operation LD (INTMK0), 00H ; Disable INT0 LD (PDFC), 00H ; Set PD0 as port mode LD (PDCR), 00H ; Set PD0 as input mode LD (WUPMOD), 01H ; Set WUINT0 as “Falling or rising edge” LD (WUPEDGE), 01H ; Set WUINT0 to “Rising edge” LD (WUPFLAG), 00H ; Clear WUINT0 flag LD (INTE0AD), 03H ; Set INT0 (function as WUINT0) interrupt level to 3 LD (INTCLR), 0AH ; Clear INT0 request flag NOP ; Wait 3 cycles NOP NOP LD (INTMK0), 01H ; Enable WUINT0 EI ; Enable interrupt operation |
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