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TMP91CW28 Datasheet(PDF) 81 Page - Toshiba Semiconductor |
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TMP91CW28 Datasheet(HTML) 81 Page - Toshiba Semiconductor |
81 / 286 page TMP91CW28 2006-03-24 91CW28-79 Note 1: P9CR and P9FC do not support read-modify-write operation. Note 2: When a port 9 pin is used in input mode, the P9 register controls the on-chip pull-up resistor. A read-modify-write instruction cannot be executed if at least one pin of port 9 is placed in input mode. A read-modify-write instruction may modify the on-chip pull-up setting for an input pin depending on the current pin status. Note 3: To specify the TXD pin as an open-drain output, write a 1 to bit1 (for the TXD pin) of the ODE register. The P94/RXD pin does not have a register bit for selecting the port or timer function. The input to the P94/RXD pin is always directed to the SIO as serial receive data even when the pin is used as a general-purpose input pin. Port 9 Register 7 6 5 4 3 2 1 0 Bit symbol P96 P95 P94 P93 P92 P91 P90 Read/Write R/W Reset value Data from external port (Output latch register is set to 1) Function − 0 (Output latch register) : Pull-up resistor disabled 1 (Output latch register) : Pull-up resistor enabled − Port 9 Control Register 7 6 5 4 3 2 1 0 Bit symbol P96C P95C P94C P93C P92C P91C P90C Read/Write W Reset value 0 0 0 0 0 0 0 Function 0: Input 1: Output Port 9 direction settings 0 Input port 1 Output port Port 9 Function Register 7 6 5 4 3 2 1 0 Bit symbol P95F P93F P92F P91F P90F Read/Write W W W W W Reset value 0 0 0 0 0 Function 0: Port 1: SCLK output 0: Port 1: TXD 0: Port 1: SCL1 output 0: Port 1: SDA1/SO1 output 0: Port 1: SCK1 output Figure 3.5.32 Port 9 Registers P9 (0019H) P9CR (001CH) SCK1 output settings for P90 TXD output settings for P93 P9FC.P93F 1 P9CR.P93C 1 SCLK output settings for P95 P9FC.P95F 1 P9CR.P95C 1 P9FC.P90F 1 P9CR.P90C 1 SDA1/SO1 output settings for P91 P9FC.P91F 1 P9CR.P91C 1 SCL1 output settings for P92 P9FC.P92F 1 P9CR.P92C 1 P9FC (001DH) |
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