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UPSD3422 Datasheet(PDF) 43 Page - STMicroelectronics

Part # UPSD3422
Description  Turbo Plus Series Fast Turbo 8032 MCU with USB and Programmable Logic
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

UPSD3422 Datasheet(HTML) 43 Page - STMicroelectronics

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uPSD34xx
uPSD34xx instruction set summary
43/293
Note:
1
All mnemonics copyrighted ©Intel Corporation 1980.
Table 7.
Logical instruction set
Note:
1
All mnemonics copyrighted ©Intel Corporation 1980.
INC
DPTR
Increment Data Pointer
1 byte/2 cycle
MUL
AB
Multiply ACC and B
1 byte/4 cycle
DIV
AB
Divide ACC by B
1 byte/4 cycle
DA
A
Decimal adjust ACC
1 byte/1 cycle
Mnemonic(1) and Use
Description
Length/Cycles
Mnemonic(1) and Use
Description
Length/Cycles
Logical Instructions
ANL
A, Rn
AND register to ACC
1 byte/1 cycle
ANL
A, direct
AND direct byte to ACC
2 byte/1 cycle
ANL
A, @Ri
AND indirect SRAM to ACC
1 byte/1 cycle
ANL
A, #data
AND immediate data to ACC
2 byte/1 cycle
ANL
direct, A
AND ACC to direct byte
2 byte/1 cycle
ANL
direct, #data
AND immediate data to direct byte
3 byte/2 cycle
ORL
A, Rn
OR register to ACC
1 byte/1 cycle
ORL
A, direct
OR direct byte to ACC
2 byte/1 cycle
ORL
A, @Ri
OR indirect SRAM to ACC
1 byte/1 cycle
ORL
A, #data
OR immediate data to ACC
2 byte/1 cycle
ORL
direct, A
OR ACC to direct byte
2 byte/1 cycle
ORL
direct, #data
OR immediate data to direct byte
3 byte/2 cycle
SWAP
A
Swap nibbles within the ACC
1 byte/1 cycle
XRL
A, Rn
Exclusive-OR register to ACC
1 byte/1 cycle
XRL
A, direct
Exclusive-OR direct byte to ACC
2 byte/1 cycle
XRL
A, @Ri
Exclusive-OR indirect SRAM to ACC
1 byte/1 cycle
XRL
A, #data
Exclusive-OR immediate data to ACC
2 byte/1 cycle
XRL
direct, A
Exclusive-OR ACC to direct byte
2 byte/1 cycle
XRL
direct, #data
Exclusive-OR immediate data to direct byte
3 byte/2 cycle
CLR
A
Clear ACC
1 byte/1 cycle
CPL
A
Compliment ACC
1 byte/1 cycle
RL
A
Rotate ACC left
1 byte/1 cycle
RLC
A
Rotate ACC left through the carry
1 byte/1 cycle
RR
A
Rotate ACC right
1 byte/1 cycle
RRC
A
Rotate ACC right through the carry
1 byte/1 cycle


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