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TMP91C025FG Datasheet(PDF) 18 Page - Toshiba Semiconductor |
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TMP91C025FG Datasheet(HTML) 18 Page - Toshiba Semiconductor |
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18 / 260 page  TMP91C025 2007-02-28 91C025-16 3.3.2 SFRs 7 6 5 4 3 2 1 0 Bit symbol XEN XTEN RXEN RXTEN RSYSCK WUEF PRCK1 PRCK0 Read/Write R/W After reset 1 1 1 0 0 0 0 0 Function High- frequency oscillator (fc) 0: Stop 1: Oscillation Low- frequency oscillator (fs) 0: Stop 1: Oscillation (Note 1) High- frequency oscillator (fc) after release of STOP mode 0: Stop 1: Oscillation Low- frequency oscillator (fs) after release of STOP mode 0: Stop 1: Oscillation Selects clock after release of STOP mode 0: fc 1: fs Warm-up timer 0: Write Don’t care 1: Write start timer 0: Read end warm-up 1:Read do not end warm-up Select prescaler clock 00: fFPH 01: Reserved 10: fc/16 11: Reserved 7 6 5 4 3 2 1 0 Bit symbol SYSCK GEAR2 GEAR1 GEAR0 Read/Write R/W After reset 0 1 0 0 Function Select system clock 0: fc 1: fs Select gear value of high-frequency (fc) 000: fc 001: fc/2 010: fc/4 011: fc/8 100: fc/16 101: (Reserved) 110: (Reserved) 111: (Reserved) 7 6 5 4 3 2 1 0 Bit symbol PSENV WUPTM1 WUPTM0 HALTM1 HALTM0 SELDRV DRVE Read/Write R/W R/W R/W R/W R/W R/W R/W After reset 0 1 0 1 1 0 0 Function 0: Power save mode enable 1: Disable (Note 2) Warm-up timer 00: Reserved 01: 2 8/inputted frequency 10: 2 14 11: 2 16 HALT mode 00: Reserved 01: STOP mode 10: IDLE1 mode 11: IDLE2 mode <DRVE> mode select 0: IDLE1 1: STOP (Note 3) Pin state control in STOP/IDLE1 mode 0: I/O off 1: Remains the state before halt Note 1: By reset, low-frequency oscillator is enabled. Note 2: When hard ware standby mode is entered, the meaning of SYSCR2<HALTM1:0> = 11 shows IDLE1 mode. Note 3: “0” means IDLE1 and “1” means STOP. Please be carefull because this setting is sometimes different from others. Figure 3.3.3 SFRs for System Clock SYSCR0 (00E0H) SYSCR2 (00E2H) SYSCR1 (00E1H) |
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