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TMPR4951B Datasheet(PDF) 50 Page - Toshiba Semiconductor |
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TMPR4951B Datasheet(HTML) 50 Page - Toshiba Semiconductor |
50 / 256 page Chapter 2 Features 2-2 2.1 Block Diagram Figure 2.1.1 TX4951B Processor Signals 32-bit SysAD Bus CG (PLL) Synchro- nize Interrupt / Reset TX49/L3 Core SysAD Interface 16 KB 4-Way set Instruction Cache 8 KB 4-Way set Data Cache Write Buffer Integer Unit System Control Coprocessor (CP0) GPR Data Path MAC Pipeline Control CP0 Registers MMU / TLB Exception Unit TX4951B EJTAG Interface JTAG (BSR) MasterClock Cache Controller DSU (EJTAG) |
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