Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.COM

X  

SN74V3640 Datasheet(PDF) 12 Page - Texas Instruments

Part # SN74V3640
Description  102436, 204836, 409636, 819236, 1638436, 32768 횞 36 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES
Download  50 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

SN74V3640 Datasheet(HTML) 12 Page - Texas Instruments

Back Button SN74V3640 Datasheet HTML 8Page - Texas Instruments SN74V3640 Datasheet HTML 9Page - Texas Instruments SN74V3640 Datasheet HTML 10Page - Texas Instruments SN74V3640 Datasheet HTML 11Page - Texas Instruments SN74V3640 Datasheet HTML 12Page - Texas Instruments SN74V3640 Datasheet HTML 13Page - Texas Instruments SN74V3640 Datasheet HTML 14Page - Texas Instruments SN74V3640 Datasheet HTML 15Page - Texas Instruments SN74V3640 Datasheet HTML 16Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 12 / 50 page
background image
SN74V3640, SN74V3650, SN74V3660, SN74V3670, SN74V3680, SN74V3690
1024
× 36, 2048 × 36, 4096 × 36, 8192 × 36, 16384 × 36, 32768 × 36
3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES
SCAS668A – NOVEMBER 2001 – REVISED MARCH 2003
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
empty flag/output ready (EF/OR)
EF/OR is a dual-purpose pin. In the standard mode, the EF function is selected. When the FIFO is empty, EF
goes low, inhibiting further read operations. When EF is high, the FIFO is not empty.
See Figure 8 for timing information.
In FWFT mode, the OR function is selected. OR goes low at the same time the first word written to an empty
FIFO appears valid on the outputs. OR stays low after the RCLK low-to-high transition that shifts the last word
from the FIFO memory to the outputs. OR goes high only with a true read (RCLK with REN = low). The previous
data stays at the outputs, indicating the last word was read. Further data reads are inhibited until OR goes low
again.
See Figure 10 for timing information.
EF/OR is synchronous and updated on the rising edge of RCLK.
In standard mode, EF is a double register-buffered output. In FWFT mode, OR is a triple register-buffered
output.
programmable almost-full flag (PAF)
PAF goes low when the FIFO reaches the almost-full condition. In standard mode, if no reads are performed
after reset (MRS), PAF goes low after (D – m) words are written to the FIFO. The PAF goes low after (1024 – m)
writes for the SN74V3640, (2048 – m) writes for the SN74V3650, (4096 – m) writes for the SN74V3660,
(8192 – m) writes for the SN74V3670, (16384 – m) writes for the SN74V3680, and (32768 – m) writes for the
SN74V3690. The offset m is the full offset value. The default setting for this value is shown in Table 2.
In FWFT mode, PAF goes low after (1025 – m) writes for the SN74V3640, (2049 – m) writes for the SN74V3650,
(4097 – m) writes for the SN74V3660, (8193 – m) writes for the SN74V3670, (16385 – m) writes for the
SN74V3680, and (32769 – m) writes for the SN74V3690. The offset m is the full offset value. The default setting
for this value is shown in Table 2.
See Figure 18 for timing information.
If the asynchronous PAF configuration is selected, PAF is asserted low on the low-to-high transition of WCLK.
PAF is reset to high on the low-to-high transition of RCLK. If the synchronous PAF configuration is selected, PAF
is updated on the rising edge of WCLK.
See Figure 20 for timing information.
programmable almost-empty flag (PAE)
PAE goes low when the FIFO reaches the almost-empty condition. In standard mode, PAE goes low when there
are n words, or fewer, in the FIFO. The offset n is the empty offset value. The default setting for this value is
shown in Table 2.
In FWFT mode, PAE goes low when there are n + 1 words, or fewer, in the FIFO. The default setting for this
value is shown in Table 2.
See Figure 19 for timing information.
If the asynchronous PAE configuration is selected, PAE is asserted low on the low-to-high transition of RCLK.
PAE is reset to high on the low-to-high transition of WCLK. If the synchronous PAE configuration is selected,
PAE is updated on the rising edge of RCLK.
See Figure 21 for timing information.


Similar Part No. - SN74V3640

ManufacturerPart #DatasheetDescription
logo
Texas Instruments
SN74V215 TI-SN74V215 Datasheet
555Kb / 40P
[Old version datasheet]   512 X 18, 1024 X 18, 2048 X 18, 4096 X 18 DSP-SYNC FIRST-IN, FIRST-OUT MEMORIES
SN74V215 TI-SN74V215 Datasheet
590Kb / 43P
[Old version datasheet]   512 X 18, 1024 X 18, 2048 X 18, 4096 X 18 DSP-SYNC FIRST-IN, FIRST-OUT MEMORIES
SN74V215-10PAG TI-SN74V215-10PAG Datasheet
590Kb / 43P
[Old version datasheet]   512 X 18, 1024 X 18, 2048 X 18, 4096 X 18 DSP-SYNC FIRST-IN, FIRST-OUT MEMORIES
SN74V215-10PAG TI-SN74V215-10PAG Datasheet
600Kb / 43P
[Old version datasheet]   512 X 18, 1024 X 18, 2048 X 18, 4096 X 18 DSP-SYNC FIRST-IN, FIRST-OUT MEMORIES
SN74V215-15PAG TI-SN74V215-15PAG Datasheet
590Kb / 43P
[Old version datasheet]   512 X 18, 1024 X 18, 2048 X 18, 4096 X 18 DSP-SYNC FIRST-IN, FIRST-OUT MEMORIES
More results

Similar Description - SN74V3640

ManufacturerPart #DatasheetDescription
logo
Texas Instruments
SN74ALVC3651 TI-SN74ALVC3651 Datasheet
383Kb / 26P
[Old version datasheet]   2048 횞 36 SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY
SN74ACT3641 TI-SN74ACT3641 Datasheet
379Kb / 26P
[Old version datasheet]   1024 횞 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY
SN54ACT3641 TI-SN54ACT3641 Datasheet
377Kb / 26P
[Old version datasheet]   1024 횞 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY
SN74ACT3651 TI-SN74ACT3651 Datasheet
376Kb / 26P
[Old version datasheet]   2048 횞 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY
SN74ACT3651 TI1-SN74ACT3651_09 Datasheet
470Kb / 29P
[Old version datasheet]   2048 횞 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY
SN74ACT3632 TI1-SN74ACT3632_08 Datasheet
503Kb / 30P
[Old version datasheet]   512 횞 36 횞 2CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SN74V263 TI-SN74V263 Datasheet
803Kb / 52P
[Old version datasheet]   8192 횞 18, 16384 횞 18, 32768 횞 18, 65536 횞 18 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES
SN74ACT3622 TI-SN74ACT3622 Datasheet
417Kb / 28P
[Old version datasheet]   256 횞 36 횞 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SN54ACT3632 TI-SN54ACT3632 Datasheet
383Kb / 25P
[Old version datasheet]   512 횞 36 횞 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SN74ABT3612 TI-SN74ABT3612 Datasheet
462Kb / 31P
[Old version datasheet]   64 횞 36 횞 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com