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ADS62P15 Datasheet(PDF) 6 Page - Texas Instruments

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Part No. ADS62P15
Description  Dual Channel 11-Bits, 125 MSPS ADC With Parallel CMOS/DDR LVDS Outputs
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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ADS62P15 Datasheet(HTML) 6 Page - Texas Instruments

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ADS62P15
SLAS572 – OCTOBER 2007
ELECTRICAL CHARACTERISTICS (continued)
Typical values at 25
°C, min and max values are across the full temperature range T
MIN = –40°C to TMAX = 85°C, AVDD =
3.3V, DRVDD = 1.8V to 3.3V, sampling frequency = 125 MSPS, 50% clock duty cycle, –1dBFS differential analog input,
internal reference mode, applies to CMOS and LVDS interfaces (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Fin= 10 MHz
67.2
Fin = 50 MHz
65.5
67.1
Fin = 70 MHz
67.1
SNR
Signal to noise ratio
0 dB gain
66.8
dBFS
Fin= 170 MHz
3.5 dB gain
66.4
0 dB gain
66.6
Fin = 230 MHz
3.5 dB gain
66.2
Fin= 10 MHz
67.1
Fin = 50 MHz
65
66.9
Fin = 70 MHz
66.9
SINAD
Signal to noise and distortion ratio
0 dB gain
66.5
dBFS
Fin= 170 MHz
3.5 dB gain
66.2
0 dB gain
66.3
Fin = 230 MHz
3.5 dB gain
65.9
ENOB
Effective number of bits
Fin = 50 MHz
10.5
10.8
LSB
Fin= 10 MHz
89
Fin = 50 MHz
75
79
Fin = 70 MHz
85
SFDR
Spurious free dynamic range
0 dB gain
82
dBc
Fin= 170 MHz
3.5 dB gain
84
0 dB gain
78
Fin = 230 MHz
3.5 dB gain
80
Fin= 10 MHz
87
Fin = 50 MHz
72
77
Fin = 70 MHz
83
THD
Total harmonic distortion
0 dB gain
79
dBc
Fin= 170 MHz
3.5 dB gain
81
0 dB gain
75
Fin = 230 MHz
3.5 dB gain
77
Fin= 10 MHz
95
Fin = 50 MHz
75
93
Fin = 70 MHz
93
HD2
Second harmonic distortion
0 dB gain
85
dBc
Fin= 170 MHz
3.5 dB gain
87
0 dB gain
82
Fin = 230 MHz
3.5 dB gain
84
Fin= 10 MHz
89
Fin = 50 MHz
75
79
Fin = 70 MHz
85
HD3
Third harmonic distortion
0 dB gain
82
dBc
Fin= 170 MHz
3.5 dB gain
84
0 dB gain
78
Fin = 230 MHz
3.5 dB gain
80
6
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Copyright © 2007, Texas Instruments Incorporated
Product Folder Link(s): ADS62P15


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