10MHz to 51.84MHz TCXO

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5

Note 1: Typical values are at +25°C, nominal supply voltages, unless otherwise indicated.

Note 2: Voltages referenced to ground.

Note 3: Limits at -40°C are guaranteed by design and not production tested.

Note 5: Guaranteed by design and not production tested.

Note 6: After this period, the first clock pulse is generated.

to bridge the undefined region of the falling edge of SCL.

This is automatically the case if the device does not stretch the low period of the SCL signal. If such a device does not

1250ns before the SCL line is released.

AC ELECTRICAL CHARACTERISTICS (continued)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Standard mode

4.7

Setup Time for STOP Condition

Fast mode

0.6

µs

Pin Capacitance SDA, SCL

(Note 5)

10

pF

Capacitive Load for Each Bus

Line (Note 10)

400

pF

Pulse Width of Spikes That Must

Be Suppressed by the Input Filter

Fast mode

30

ns

SDA

SCL

REPEATED

START

STOP

START