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DS3690T+TRL Datasheet(PDF) 3 Page - Maxim Integrated Products |
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DS3690T+TRL Datasheet(HTML) 3 Page - Maxim Integrated Products |
3 / 7 page 3.3V 26-Channel, Three-Stateable Transmission Gate _______________________________________________________________________________________ 3 Note 1: All voltages referenced to ground. Note 2: Typical waveform shown is labeled CHxxA (input) to CHxxB (output), and is identical in function when selecting pin CHxxB (as the input) to pin CHxxA (as the output). Note 3: Output reference level is VCC/2. Note 4: Input transitions prior to the CE falling edge are ignored (don’t care). Note 5: Propagation delay differential between any two channels when using a common input signal source. Note 6: Guaranteed by design and not 100% tested. CAPACITANCE (TA = +25°C) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Input Capacitance (CE) CIN Not production tested 5 pF I/O Capacitance CIO Not production tested 8 pF Timing Diagrams CHxxA CHxxB tPD tPD tPD Figure 1. Digital Channel Propagation Delay tCEV tIS HIGH IMPEDANCE CHxxA CHxxB DON'T CARE CE Figure 2. Digital Channels Enabled by CE DON'T CARE HIGH IMPEDANCE CHxxA CHxxB CE tCEZ Figure 3. Digital Channels Disabled by CE |
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