74AUP1T97 datasheet(3/17 Pages) NXP

Part #	74AUP1T97

Description	Low-power configurable gate with voltage-level translator

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Manufacturer	NXP [NXP Semiconductors]

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74AUP1T97_1

Product data sheet

Rev. 01 — 25 October 2007

3 of 17

NXP Semiconductors

74AUP1T97

Low-power conﬁgurable gate with voltage-level translator

6.

Pinning information

6.1 Pinning

6.2 Pin description

7.

Functional description

[1]

H = HIGH voltage level;

L = LOW voltage level.

Fig 2.

Pin conﬁguration SOT363

(SC-88)

Fig 3.

Pin conﬁguration SOT886

(XSON6)

Fig 4.

Pin conﬁguration SOT891

(XSON6)

74AUP1T97

BC

GND

AY

001aag500

1

2

3

6

VCC

5

4

74AUP1T97

GND

001aag501

B

A

VCC

C

Y

Transparent top view

2

3

1

5

4

6

74AUP1T97

GND

001aag502

B

A

VCC

C

Y

Transparent top view

2

3

1

5

4

6

Table 3.

Pin description

Symbol

Description

B

1

data input

GND

2

ground (0 V)

A

3

data input

Y

4

data output

VCC

5

supply voltage

C

6

data input

Table 4.

Function table[1]

Input

Output

C

B

A

Y

LLLL

LLH

L

LH

L

HHH

H

LLL

HL

HH

HHL

L

HHHH

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