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S29GL032N11FFI020 Datasheet(PDF) 52 Page - SPANSION

Part # S29GL032N11FFI020
Description  64 Megabit, 32 Megabit 3.0-Volt only Page Mode Flash Memory Featuring 110 nm MirrorBit Process Technology
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Manufacturer  SPANSION [SPANSION]
Direct Link  http://www.spansion.com
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52
S29GL-N MirrorBit® Flash Family
S29GL-N_01_09 November 16, 2007
Da ta
Sh e e t
Table 10.2 Sector Protection Commands (x16)
Command Sequence
(Notes)
Bus Cycles (Notes 2–4)
First
Second
Third
Fourth
Fifth
Sixth
Seventh
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Command Set Entry
(Note 5)
3
555
AA
2AA
55
555
40
Program (Note 6)
2
XX
A0
XXX
Data
Read (Note 6)
1
00
Data
Command Set Exit
(Note 7)
2XX
90
XX
00
Command Set Entry
(Note 5)
3
555
AA
2AA
55
555
60
Program (Note 8)
2XX
A0
PWAx
PWDx
Read (Note 9)
4
XXX
PWD0
01
PWD1
02
PWD2
03
PWD3
Unlock (Note 10)
7
00
25
00
03
00
PWD0
01
PWD1
02
PWD2
03
PWD3
00
29
Command Set Exit
(Note 7)
2XX
90
XX
00
Command Set Entry
(Note 5)
3
555
AA
2AA
55
555
C0
PPB Program (Note 11)
2XX
A0
SA
00
All PPB Erase
(Notes 11, 12)
2XX
80
00
30
PPB Status Read
1
SA
RD(0)
Command Set Exit
(Note 7)
2XX
90
XX
00
Command Set Entry
(Note 5)
3
555
AA
2AA
55
555
50
PPB Lock Bit Set
2
XX
A0
XX
00
PPB Lock Bit Status Read
1
XXX
RD(0)
Command Set Exit
(Note 7)
2XX
90
XX
00
Command Set Entry
(Note 5)
3
555
AA
2AA
55
555
E0
DYB Set
2
XX
A0
SA
00
DYB Clear
2
XX
A0
SA
01
DYB Status Read
1
SA
RD(0)
Command Set Exit
(Note 7)
2XX
90
XX
00
Legend
X = Don’t care.
RA = Address of the memory location to be read.
SA = Sector Address. Any address that falls within a specified sector. See
Tables 8.2–8.8 for sector address ranges.
PWA = Password Address. Address bits A1 and A0 are used to select each 16-
bit portion of the 64-bit entity.
PWD = Password Data.
RD(0) = DQ0 protection indicator bit. If protected, DQ0 = 0. If unprotected,
DQ0 = 1.
Notes
1. All values are in hexadecimal.
2. Shaded cells indicate read cycles.
3. Address and data bits not specified in table, legend, or notes are don’t
cares (each hex digit implies 4 bits of data).
4. Writing incorrect address and data values or writing them in the improper
sequence may place the device in an unknown state. The system must
write the reset command to return the device to reading array data.
5. Entry commands are required to enter a specific mode to enable
instructions only available within that mode.
6. No unlock or command cycles required when bank is reading array data.
7. Exit command must be issued to reset the device into read mode; device
may otherwise be placed in an unknown state.
8. Entire two bus-cycle sequence must be entered for each portion of the
password.
9. Full address range is required for reading password.
10. Password may be unlocked or read in any order. Unlocking requires the full
password (all seven cycles).
11. ACC must be at VIH when setting PPB or DYB.
12. “All PPB Erase” command pre-programs all PPBs before erasure to prevent
over-erasure.


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