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PEX8311-AA66BCF Datasheet(PDF) 3 Page - PLX Technology

Part # PEX8311-AA66BCF
Description  PCI Express to Generic Local Bus Bridge
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Manufacturer  PLX [PLX Technology]
Direct Link  http://www.plxtech.com
Logo PLX - PLX Technology

PEX8311-AA66BCF Datasheet(HTML) 3 Page - PLX Technology

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System Controller Card
The PEX 8311 bridge, with its Root Complex mode
support, simplified generic local bus interface, PCIe
protocol packet conversion, and multiple DMA
controllers allows users to use the device as a “north
bridge” type application in embedded systems. Such
controllers often manage “control path” data. The local
bus has the capability to support numerous simultaneous
local bus devices. Figure 2 shows the bridge interfacing
a local processor, FPGA, and memory to a downstream
PCIe port. The PCIe port connects to a switching fabric
or I/O card.
Figure 2. “Northbridge” Host Bridge
Line Card Application
The number and variety of PCI Express native-mode
devices is growing quickly. As these devices become
mainstream, it will be necessary to create multifunction
and multi-port adapter cards with PCI Express
capability.
The PEX 8311 can be used to create a communications
line card that bridges a local processing device and
memory to an upstream PCIe port. The bridge allows a
line card to be a backplane or a motherboard. Figure 3
shows the PEX 8311 in this application. In this mode,
the bridge acts in an “EndPoint mode”. Configuration to
the bridge comes from the PCIe. Use of DMA for data
path and higher priority simultaneous Direct
Master/Slave for control path data is invaluable.
Figure 3. Communications Line Card
Industrial Control Systems
The PEX 8311 is an excellent choice to bridge
programmable logic, local processors, and other devices
PCI Express
FPGA
DSP
Proprietary
ASIC
Generic Local Bus
EEPROM
Local Based
CPU
SRAM/
PEX 8311
PCI Express
FPGA
DSP
Proprietary
ASIC
Generic Local Bus
EEPROM
Local Based
CPU
SRAM/
PEX 8311
x1 PCIe
Local Bus: 66 MHz, 32-bit
EEPROM
COM 1
Flash
SRAM
NPU
ASIC
COM 2
COM N
PEX 8311
x1 PCIe
Local Bus: 66 MHz, 32-bit
EEPROM
COM 1
Flash
SRAM
NPU
ASIC
COM 2
COM N
PEX 8311
to a PCIe switch. The bridge is fully interoperable with
PCIe switches from a variety of PCIe products including
multiple switches from PLX Technology with lane
counts from 8 to 32. Figure 4 illustrates PEX 8311
bridging programmable logic devices to the PEX 8524
switch. One of the many applications for the bridge is to
interface inputs via an FPGA from industrial signals
from the manufacturing floor to a PCIe switch where the
data is sent to a local processor and then to a central host
for system control applications. This use can be
generalized to many similar bridging operations such as
in instrumentation or medical imaging.
Figure 4. Industrial Control
In this type application, the bridge’s x1 lane PCIe 2.5 Gbps
bandwidth in combination with its large local bus capacitive
loading can support up to five simultaneous input sources on
each PEX 8311. With a Local Bus of up to 66 MHz and
32-bit data, complete bandwidth matching with the PCIe
port can be achieved in unidirectional designs.
Video Surveillance System
The PEX 8311 is a very economical bridge and can
support many “mass market” applications. These
applications include PC television capture cards, data
acquisition boards, video editing, and surveillance
systems. The later is shown in Figure 5 below. This
design allows multiple camera sources to feed their
inputs through a series of compression, buffering stages
and local processing and be bridged to a PCIe switch or
directly to a PCIe slot on a motherboard. The PC then
allows security personnel to monitor multiple feeds and
switch interactively among the various feeds. Video
editing by consumers could use a similar design
topology as well.
Figure 5. Video Surveillance System
CPU
SDRAM
FPGA
FPGA
FPGA
FPGA
250MB/s
250MB/s
250MB/s
250MB/s
PEX
8524
To Host
PEX 8311
PEX 8311
PEX 8311
PEX 8311
PEX 8524
CPU
SDRAM
FPGA
FPGA
FPGA
FPGA
PEX
8524
PEX 8311
PEX 8311
PEX 8311
PEX 8311
PEX 8311
PEX 8311
PEX 8311
PEX 8311
PEX 8524
CPU
SDRAM
FPGA
FPGA
FPGA
FPGA
PEX
8524
PEX 8311
PEX 8311
PEX 8311
PEX 8311
PEX 8311
PEX 8311
PEX 8311
PEX 8311
PEX 8524
CPU
SDRAM
FPGA
FPGA
FPGA
FPGA
PEX
8524
PEX 8311
PEX 8311
PEX 8311
PEX 8311
PEX 8311
PEX 8311
PEX 8311
PEX 8311
PEX 8524
JPEG
FIFO
FPGA
Camera
Camera
Camera
JPEG
FIFO
FPGA
Camera
Camera
Camera
M
o
t
h
e
r
b
o
a
r
d
CPU
CPU
PEX 8311
PEX 8311
PEX 8524
JPEG
FIFO
FPGA
JPEG
FIFO
FPGA
CPU
CPU
CPU
CPU
PEX 8311
PEX 8311
PEX 8311
PEX 8311
PEX 8524
JPEG
FIFO
FPGA
Camera
Camera
Camera
JPEG
FIFO
FPGA
Camera
Camera
Camera
CPU
CPU
CPU
CPU
PEX 8311
PEX 8311
PEX 8311
PEX 8311
PEX 8524
JPEG
FIFO
FPGA
JPEG
FIFO
FPGA
CPU
CPU
CPU
CPU
PEX 8311
PEX 8311
PEX 8311
PEX 8311
PEX 8524


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