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FDMF8704 Datasheet(PDF) 9 Page - Fairchild Semiconductor |
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FDMF8704 Datasheet(HTML) 9 Page - Fairchild Semiconductor |
9 / 11 page 9 www.fairchildsemi.com FDMF8704 Rev. F2 Module Power Loss Measurement and Calculation Refer to Figure 18 for module power loss testing method. Power loss calculation are as follows: (a) PIN = (VIN x IIN) + (VCIN x ICIN) (W) (b) POUT = VO x IOUT (W) (c) PLOSS = PIN - POUT (W) PCB Layout Guideline Figure 19. shows a proper layout example of FDMF8704 and critical parts. All of high current flow path, such as VIN, VSWH, VOUT and GND copper, should be short and wide for better and stable current flow, heat radiation and system performance. Following is a guideline which the PCB designer should consider: 1. Input bypass capacitors should be close to VIN and GND pin of FDMF8704 to help reduce input current ripple component induced by switching operation. 2. It is critical that the VSWH copper has minimum area for lower switching noise emission. VSWH copper trace should also be wide enough for high current flow. Other signal routing path, such as PWM IN and BOOT signal, should be considered with care to avoid noise pickup from VSWH copper area. 3. Output inductor location should be as close as possible to the FDMF8704 for lower power loss due to copper trace. 4. Snubber for suppressing ringing and spiking of VSWH voltage should be placed near the FDMF8704. The resistor and capacitor need to be of proper size for power dissipation. 5. Place boot diode, ceramic bypass capacitor and boot capacitor as close to VCIN and BOOT pin of FDMF8704 in order to supply stable power. Routing width and length should also be considered 6. Use multiple Vias on each copper area to interconnect each top, inner and bottom layer to help smooth current flow and heat conduction. Vias should be relatively large and of reasonable inductance. DISB PWM CGND PGND VIN VCIN VSWH DISB PWM Input CVCIN VCIN CBOOT COUT VOUT VIN CVIN BOOT IIN A IOUT A V VO ICIN A Figure 18. Power Loss Measurement Block Diagram Figure 19. Typical PCB Layout Example (Top View) HSEN L |
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