S25FL128P0XMFI001 datasheet(23/48 Pages) SPANSION

Part #	S25FL128P0XMFI001

Description	128 Megabit CMOS 3.0 Volt Flash Memory with 104-MHz SPI (Serial Peripheral Interface) Bus

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July 2, 2007 S25FL128P_00_04

S25FL128P

23

Da ta

Shee t

(Prelim i nar y )

11.3.2

Parallel Mode

In parallel mode, the maximum SCK clock frequency is 10 MHz. The device requires a single clock cycle

instead of eight clock cycles to access the next data byte. The method of memory content output will be the

same compared to the serial mode. The only difference is that a byte of data is output per clock cycle instead

of a single bit. In this case, the manufacturer identification will be output during the first byte cycle and the

device identification during the second and third byte cycles out of the PO7-PO0 serial output pins. To read ID

in parallel mode requires a Parallel Mode Entry command (55h) to be issued before the RDID command.

Once in the parallel mode, the flash memory will not exit parallel mode until a Parallel Mode Exit (45h)

command is given to the flash device, or upon power down/power up sequence.

Figure 11.5 Parallel Read_ID Command Sequence and Data Out Sequence

Table 11.1 Manufacturer & Device Identification, RDID (9Fh)

Device

Manufacturer Identification

Device Identification

Extended Device Identification

Byte 0

Byte 1

Byte 2

Byte 3

Byte 4

Uniform 256 KB Sector

01h

20h

18h

03h

00h

Uniform 64 KB Sector

01h

20h

18h

03h

01h

CS#

SCK

SI

PO[7-0]

High Impedance

Instruction

Manufacturer/Device Identification

012

3

4567

8

910

11

12

Byte

0

Byte

1

Byte

2

Byte

3

Byte

4

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S25FL128P0XMFI001 Datasheet(PDF) 23 Page - SPANSION

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