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S25FL128P Datasheet(PDF) 5 Page - SPANSION

Part No. S25FL128P
Description  128 Megabit CMOS 3.0 Volt Flash Memory with 104-MHz SPI (Serial Peripheral Interface) Bus
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Manufacturer  SPANSION [SPANSION]
Direct Link  http://www.spansion.com
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S25FL128P Datasheet(HTML) 5 Page - SPANSION

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July 2, 2007 S25FL128P_00_04
S25FL128P
5
Da ta
Shee t
(Prelim i nar y )
Figures
Figure 2.1
16-pin Plastic Small Outline Package (SO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 2.2
8-Pin WSON Package (6 x 8 mm) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 6.1
Bus Master and Memory Devices on the SPI Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 6.2
SPI Modes Supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 7.1
Hold Mode Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 11.1
Read Data Bytes (READ) Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 11.2
Parallel Read Instruction Sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 11.3
Read Data Bytes at Higher Speed (FAST_READ) Command Sequence . . . . . . . . . . . . . . . 21
Figure 11.4
Read Identification Command Sequence and Data Out Sequence. . . . . . . . . . . . . . . . . . . . 22
Figure 11.5
Parallel Read_ID Command Sequence and Data Out Sequence . . . . . . . . . . . . . . . . . . . . . 23
Figure 11.6
Serial READ_ID Instruction Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 11.7
Parallel Read_ID Instruction Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 11.8
Write Enable (WREN) Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 11.9
Write Disable (WRDI) Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 11.10 Read Status Register (RDSR) Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 11.11 Parallel Read Status Register (RDSR) Instruction Sequence . . . . . . . . . . . . . . . . . . . . . . . .28
Figure 11.12 Write Status Register (WRSR) Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 11.13 Parallel Write Status Register (WRSR) Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 11.14 Page Program (PP) Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 11.15 Parallel Page Program (PP) Instruction Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 11.16 Sector Erase (SE) Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 11.17 Bulk Erase (BE) Command Sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 11.18 Deep Power Down (DP) Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 11.19 Release from Deep Power Down (RES) Command Sequence . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 11.20 Serial Release from Deep Power Down and
Read Electronic Signature (RES) Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
Figure 11.21 Parallel Release from Deep Power Down and
Read Electronic Signature (RES) Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
Figure 12.1
ACC Program Acceleration Timing Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Figure 13.1
Power-Up Timing Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 15.1
Maximum Negative Overshoot Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 15.2
Maximum Positive Overshoot Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 18.1
AC Measurements I/O Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Figure 19.1
SPI Mode 0 (0,0) Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 19.2
SPI Mode 0 (0,0) Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 19.3
HOLD# Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Figure 19.4
Write Protect Setup and Hold Timing during WRSR when SRWD=1 . . . . . . . . . . . . . . . . . . 44


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