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PCA9306DC1 Datasheet(PDF) 5 Page - NXP Semiconductors |
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PCA9306DC1 Datasheet(HTML) 5 Page - NXP Semiconductors |
5 / 21 page PCA9306_2 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 02 — 21 February 2007 5 of 21 NXP Semiconductors PCA9306 Dual bidirectional I2C-bus and SMBus voltage-level translator 5.2 Pin description 6. Functional description Refer to Figure 1 “Logic diagram of PCA9306 (positive logic)”. 6.1 Function table [1] EN is controlled by the Vbias(ref)(2) logic levels and should be at least 1 V higher than Vref(1) for best translator operation. Table 2. Pin description Symbol Pin Description SO8, TSSOP8 (MSOP8), TSSOP8, VSSOP8 (DC1), XQFN8 VSSOP8 (DC) GND 1 4 ground (0 V) VREF1 2 1 low-voltage side reference supply voltage for SCL1 and SDA1 SCL1 3 2 serial clock, low-voltage side; connect to VREF1 through a pull-up resistor SDA1 4 3 serial data, low-voltage side; connect to VREF1 through a pull-up resistor SDA2 5 5 serial data, high-voltage side; connect to VREF2 through a pull-up resistor SCL2 6 6 serial clock, high-voltage side; connect to VREF2 through a pull-up resistor VREF2 7 7 high-voltage side reference supply voltage for SCL2 and SDA2 EN 8 8 switch enable input; connect to VREF2 and pull-up through a high resistor Table 3. Function selection (example) H = HIGH level; L = LOW level. Input EN[1] Function H SCL1 = SCL2; SDA1 = SDA2 L disconnect |
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