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DS3102 Datasheet(PDF) 89 Page - Maxim Integrated Products |
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DS3102 Datasheet(HTML) 89 Page - Maxim Integrated Products |
89 / 141 page ____________________________________________________________________________________________ DS3102 Rev: 102607 89 of 141 Register Name: IER3 Register Description: Interrupt Enable Register 3 Register Address: 45h Bit # 7 6 5 4 3 2 1 0 Name FSMON T4LOCK — T4NOIN — — — — Default 0 0 0 0 0 0 0 0 Bit 7: Interrupt Enable for Frame-Sync Input Monitor Alarm (FSMON). This bit is an interrupt enable for the FSMON bit in the MSR3 register. 0 = Mask the interrupt 1 = Enable the interrupt Bit 6: Interrupt Enable for the T4 DPLL Lock Status Change (T4LOCK). This bit is an interrupt enable for the T4LOCK bit in the MSR3 register. 0 = Mask the interrupt 1 = Enable the interrupt Bit 4: Interrupt Enable for T4 No Valid Inputs Alarm (T4NOIN). This bit is an interrupt enable for the T4NOIN bit in the MSR3 register. 0 = Mask the interrupt 1 = Enable the interrupt |
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