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SYS82000RKXCLI-12 Datasheet(PDF) 1 Page - MOSAIC |
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SYS82000RKXCLI-12 Datasheet(HTML) 1 Page - MOSAIC |
1 / 7 page Address Inputs A0 ~ A20 Data Input/Output D0 ~ D7 Chip Select CS Write Enable WE Output Enable OE No Connect NC Power (+5V) V CC Ground GND Package Details Pin Definition Description Features Issue 1.3 : April 2001 SYS82000RKXC - 70/85/10/12 2M x 8 SRAM MODULE • Access Times of 85/100/120 ns. • Low Power Disapation: Operating 600 mW (Max.) Standby-L Version 1.1 mW (Max.) • 5 Volt Supply ± 10%. • Completely Static Operation. • Low Voltage VCC Data Retention. • On-board Decoding & Decoupling Capacitors. • 38 Pin Single-In-Line package (SIP). • Upgrade path to SYS84000RKXC (32Mbits). The SYS82000RKXC is a plastic 16Mbit Static RAM Module housed in a standard 38 pin Single In- Line package organised as 2M x 8 with access times of 85,100, or 120 ns. The module is constructed using four 512Kx8 SRAMs in TSOPII packages mounted onto an FR4 epoxy substrate. This offers an extremely high PCB packing density. The device is offered in standard and low power versions, with the -L module having a low voltage data retention mode for battery backed applications. Block Diagram Pin Functions Plastic 38 pin Single-In-Line (SIP) NC A20 Vcc WE D2 D3 D0 A1 A2 A3 A4 GND D5 A10 A11 A5 A13 A14 A19 CS A15 A16 A12 A18 A6 D1 GND A0 A7 A8 A9 D7 D4 D6 A17 Vcc OE NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 Pin 38 is A21 on the SYS84000RKXC upgrade module. 512K x 8 SRAM A0 - A18 WE OE A19 A20 CS DECODER CS 512K x 8 SRAM CS 512K x 8 SRAM CS 512K x 8 SRAM CS D0 - D7 |
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