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TPS51125 Datasheet(PDF) 6 Page - Texas Instruments

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Part No. TPS51125
Description  Dual-Synchronous, Step-Down Controller with Out-of-Audio™ Operation and 100-mA LDOs for Notebook System Power
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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TPS51125 Datasheet(HTML) 6 Page - Texas Instruments

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DEVICE INFORMATION
TPS51125
SLUS786A – OCTOBER 2007 – REVISED NOVEMBER 2007
Table 1. TERMINAL FUNCTIONS TABLE
TERMINAL
I/O
DESCRIPTION
NAME
NO.
VIN
16
I
High voltage power supply input for 5-V/3.3-V LDO.
GND
15
-
Ground.
VREG3
8
O
3.3-V power supply output.
VREG5
17
O
5-V power supply output.
VREF
3
O
2-V reference voltage output.
Master enable input.
Open : LDOs on, and ready to turn on VCLK and switcher channels.
620 k
Ω to GND : enable both LDOs, VCLK off and ready to turn on switcher channels. Power
EN0
13
I/O
consumption is almost the same as the case of VCLK = ON. 330 pF to 1 nF should be connected to
GND near the device
GND : disable all circuit
Channel 1 and Channel 2 enable and OCL trip setting pins.
ENTRIP1,
1, 6
I/O
Connect resistor from this pin to GND to set threshold for synchronous RDS(on) sense. Short to ground
ENTRIP2
to shutdown a switcher channel.
Output connection to SMPS. These terminals work as fixed voltage inputs and output discharge
VO1, VO2
24, 7
I/O
inputs. VO1 and VO2 also work as 5 V and 3.3 V switch over return power input respectively.
VFB1,
SMPS feedback inputs. Connect with feedback resistor divider.
2, 5
I
VFB2
PGOOD
23
O
Power Good window comparator output for channel 1 and 2. (Logical AND)
Selection pin for operation mode:
OOA auto skip : Connect to VREG3 or VREG5
SKIPSEL
14
I
Auto skip : Connect to VREF
PWM only : Connect to GND
On-time adjustment pin.
365 kHz/460 kHz setting : connect to VREG5
TONSEL
4
I
300 kHz/375 kHz setting : connect to VREG3
245 kHz/305 kHz setting : connect to VREF
200 kHz/250 kHz setting : connect to GND
DRVL1,
Low-side N-channel MOSFET driver outputs. GND referenced drivers.
19, 12
O
DRVL2
VBST1,
Supply input for high-side N-channel MOSFET driver (boost terminal).
22, 9
I
VBST2
DRVH1,
High-side N-channel MOSFET driver outputs. LL referenced drivers.
21, 10
O
DRVH2
LL1, LL2
20, 11
I
Switch node connections for high-side drivers, current limit and control circuitry.
VCLK
18
O
270-kHz clock output for 15-V charge pump.
6
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Copyright © 2007, Texas Instruments Incorporated
Product Folder Link(s): TPS51125


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