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PC912XDP512J1VAL Datasheet(PDF) 84 Page - Freescale Semiconductor, Inc |
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PC912XDP512J1VAL Datasheet(HTML) 84 Page - Freescale Semiconductor, Inc |
84 / 1350 page Chapter 2 Clocks and Reset Generator (S12CRGV6) MC9S12XDP512 Data Sheet, Rev. 2.17 84 Freescale Semiconductor 2.3.2 Register Descriptions This section describes in address order all the CRG registers and their individual bits. Register Name Bit 7 6 5 4 3 2 1 Bit 0 SYNR R 0 0 SYN5 SYN4 SYN3 SYN2 SYN1 SYN0 W REFDV R 0 0 REFDV5 REFDV4 REFDV3 REFDV2 REFDV1 REFDV0 W CTFLG R 0 0 0 0 0000 W CRGFLG R RTIF PORF LVRF LOCKIF LOCK TRACK SCMIF SCM W CRGINT R RTIE ILAF 0 LOCKIE 00 SCMIE 0 W CLKSEL R PLLSEL PSTP 00 PLLWAI 0 RTIWAI COPWAI W PLLCTL R CME PLLON AUTO ACQ FSTWKP PRE PCE SCME W RTICTL R RTDEC RTR6 RTR5 RTR4 RTR3 RTR2 RTR1 RTR0 W COPCTL R WCOP RSBCK 000 CR2 CR1 CR0 W WRTMASK FORBYP R 0 0 0 0 0000 W CTCTL R 1 0 0 0 0000 W ARMCOP R 0 0 0 0 0000 W Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 = Unimplemented or Reserved Figure 2-3. S12CRGV6 Register Summary |
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