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LAN9218 Datasheet(PDF) 54 Page - SMSC Corporation

Part # LAN9218
Description  High-Performance Single- Chip 10/100 Ethernet Controller with HP Auto-MDIX
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Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

LAN9218 Datasheet(HTML) 54 Page - SMSC Corporation

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High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX
Datasheet
Revision 1.8 (06-06-07)
54
SMSC
LAN9218
DATASHEET
When performing a fast-forward, there must be at least 4 DWORDs of data in the RX data FIFO for
the packet being discarded. For less than 4 DWORDs do not use RX_FFWD. In this case data must
be read from the RX data FIFO and discarded using standard PIO read operations.
After initiating a fast-forward operation, do not perform any reads of the RX data FIFO until the
RX_FFWD bit is cleared. Other resources can be accessed during this time (i.e., any registers and/or
the other three FIFOs). Also note that the RX_FFWD will only fast-forward the RX data FIFO, not the
RX status FIFO.
The receiver does not have to be stopped to perform a fast-forward operation.
3.12.1.2
Force Receiver Discard (Receiver Dump)
In addition to the Receive data Fast Forward feature, LAN9218 also implements a receiver "dump"
feature. This feature allows the host processor to flush the entire contents of the RX data and RX
status FIFOs. When activated, the read and write pointers for the RX data and status FIFOs will be
returned to their reset state. To perform a receiver dump, the LAN9218 receiver must be halted. Once
the receiver stop completion is confirmed, the RX_DUMP bit can be set in the RX_CFG register. The
RX_DUMP bit is cleared when the dump is complete. For more information on stopping the receiver,
please refer to Section 3.12.4, "Stopping and Starting the Receiver," on page 56. For more information
on the RX_DUMP bit, please refer to Section 5.3.7, "RX_CFG—Receive Configuration Register," on
page 76.


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