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S70GL02GP12FAIR22 Datasheet(PDF) 3 Page - SPANSION |
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S70GL02GP12FAIR22 Datasheet(HTML) 3 Page - SPANSION |
3 / 14 page This document contains information on one or more products under development at Spansion Inc. The information is intended to help you evaluate this product. Do not design in this product without contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed product without notice. Publication Number S70GL-P_00 Revision 01 Issue Date December 4, 2006 General Description The Spansion S70GL02GP 2 Gigabit Mirrorbit™ Flash memory device is fabricated on 90 nm process technology. This device offers a fast page access time of 25 ns with a corresponding random access time of 120 ns. It features a Write Buffer that allows a maximum of 32 words/64 bytes to be programmed in one operation, resulting in faster effective programming time than standard programming algorithms. This makes the device an ideal product for today’s embedded applications that require higher density, better performance and lower power consumption. Distinctive Characteristics Two 1024 Megabit (S29GL01GP) in a single 64-ball Fortified- BGA package (see publication S29GL-P_00 for full specifications) Single 3V read/program/erase (2.7-3.6 V) Enhanced VersatileI/O™ control – All input levels (address, control, and DQ input levels) and outputs are determined by voltage on VIO input. VIO range is 1.65 to VCC 90 nm MirrorBit process technology 8-word/16-byte page read buffer 32-word/64-byte write buffer reduces overall programming time for multiple-word updates Secured Silicon Sector region – 128-word/256-byte sector for permanent, secure identification through an 8-word/16-byte random Electronic Serial Number – Can be programmed and locked at the factory or by the customer Uniform 64Kword/128KByte Sector Architecture – S70GL02GP: two thousand forty-eight sectors 100,000 erase cycles per sector typical 20-year data retention typical Offered Packages – 64-ball Fortified BGA Suspend and Resume commands for Program and Erase operations Write operation status bits indicate program and erase operation completion Unlock Bypass Program command to reduce programming time Support for CFI (Common Flash Interface) Persistent and Password methods of Advanced Sector Protection WP#/ACC input – Accelerates programming time (when VACC is applied) for greater throughput during system production – Protects first or last sector of each die, regardless of sector protection settings Hardware reset input (RESET#) resets device Ready/Busy# output (RY/BY#) detects program or erase cycle completion Performance Characteristics * Access times are dependent on VCC and VIO operating ranges. See Ordering Information page for further details. V1: VCC = 3.0–3.6 V. V2: VCC = VIO = 2.7–3.6 V. V3: VIO = 1.65–VCC, VCC = 3 V. ** Contact a sales representative for availability. S70GL-P MirrorBit TM Flash Family S70GL02GP 2 Gigabit, 3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology Data Sheet (Advance Information) Max. Read Access Times (ns)* Parameter 2 Gb V1 V2 V3 Random Access Time (tACC) 110 120 130 Page Access Time (tPACC)25 25 25 CE# Access Time (tCE) 110 120 130 OE# Access Time (tOE)25 25 30 Current Consumption (typical values) Random Access Read 30 mA 8-Word Page Read 1 mA Program/Erase 50 mA Standby 1 µA Program & Erase Times (typical values) Single Word Programming 60 µs Effective Write Buffer Programming (VCC) Per Word 15 µs Effective Write Buffer Programming (VACC) Per Word 15 µs Sector Erase Time (64 Kword Sector) 0.5 s |
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