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SN65LVDS9638DGNR Datasheet(PDF) 6 Page - Texas Instruments |
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SN65LVDS9638DGNR Datasheet(HTML) 6 Page - Texas Instruments |
6 / 29 page www.ti.com RECOMMENDED OPERATING CONDITIONS SN55LVDS31 ELECTRICAL CHARACTERISTICS SN55LVDS31 SWITCHING CHARACTERISTICS SN55LVDS31, SN65LVDS31 SN65LVDS3487, SN65LVDS9638 SLLS261L – JULY 1997 – REVISED JULY 2007 MIN NOM MAX UNIT VCC Supply voltage 3 3.3 3.6 V VIH High-level input voltage 2 V VIL Low-level input voltage 0.8 V SN65 prefix –40 85 TA Operating free-air temperature °C SN55 prefix –55 125 over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT VOD Differential output voltage magnitude RL = 100 Ω, See Figure 2 247 340 454 mV ΔVOD Change in differential output voltage RL = 100 Ω, See Figure 2 –50 50 mV magnitude between logic states VOC(SS) Steady-state common-mode output voltage See Figure 3 1.125 1.2 1.375 V Change in steady-state common-mode output ΔVOC(SS) See Figure 3 –50 50 mV voltage between logic states VOC(PP) Peak-to-peak common-mode output voltage See Figure 3 50 150 mV VI = 0.8 V or 2 V, Enabled, No load 9 20 ICC Supply current VI = 0.8 or 2 V, RL = 100 Ω, Enabled 25 35 mA VI = 0 or VCC, Disabled 0.25 1 IIH High-level input current VIH = 2 4 20 μA IIL Low-level input current VIL = 0.8 V 0.1 10 μA VO(Y) or VO(Z) = 0 –4 –24 IOS Short-circuit output current mA VOD = 0 ±12 IOZ High-impedance output current VO = 0 or 2.4 V ±1 μA IO(OFF) Power-off output current VCC = 0, VO = 2.4 V ±4 μA Ci Input capacitance 3 pF (1) All typical values are at TA = 25°C and with VCC = 3.3 V. over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT tPLH Propagation delay time, low-to-high-level output 0.5 1.4 4 ns tPHL Propagation delay time, high-to-low-level output 1 1.7 4.5 ns tr Differential output signal rise time (20% to 80%) 0.4 0.5 1 ns RL = 100 Ω, CL = 10 pF, See Figure 2 tf Differential output signal fall time (80% to 20%) 0.4 0.5 1 ns tsk(p) Pulse skew (|tPHL – tPLH|) 0.3 0.6 ns tsk(o) Channel-to-channel output skew(2) 0.3 0.6 ns tPZH Propagation delay time, high-impedance-to-high-level output 5.4 15 ns tPZL Propagation delay time, high-impedance-to-low-level output 2.5 15 ns See Figure 4 tPHZ Propagation delay time, high-level-to-high-impedance output 8.1 17 ns tPLZ Propagation delay time, low-level-to-high-impedance output 7.3 15 ns (1) All typical values are at TA = 25°C and with VCC = 3.3 V. (2) tsk(o) is the maximum delay time difference between drivers on the same device. 6 Submit Documentation Feedback |
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