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RT9644PQV Datasheet(PDF) 9 Page - Richtek Technology Corporation |
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RT9644PQV Datasheet(HTML) 9 Page - Richtek Technology Corporation |
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9 / 17 page  Preliminary 9 DS9644/A-01 August 2007 www.richtek.com RT9644/A To be continued Parameter Symbol Test Condition Min Typ Max Units Reference Voltage Reference Voltage VREF -- 0.8 -- V System Accuracy -2 - 2 % VDDQ PWM Controller Error Amplifier DC Gain Guaranteed By Design -- 80 -- dB Gain-Bandwidth Product GBWP 15 -- -- MHz Slew Rate SR -- 6 -- V/ µs Control I/O (S3# and S5#) Low Level Input Threshold -- -- 0.75 V High Level Input Threshold 2.2 -- -- V PWM Controller Gate Drivers UGATE and LGATE Source IGAT E -- -0.8 -- A UGATE and LGATE Sink IGATE -- 0.8 -- A VTT Regulator Upper Divider Impedance RU RU -- 2.5 -- k Ω Lower Divider Impedance RL RL -- 2.5 -- k Ω VREF_OUT Buffer Source Current IVREF_OUT -- -- 2 mA Maximum VTT Load Current IVTT_MAX Periodic load applied with 30% duty cycle and 10ms period -3 -- 3 A Linear Regulators DC GAIN Guaranteed By Design -- 80 -- dB Gain Bandwidth Product GBWP 12 -- -- MHz Slew Rate SR -- 6 -- V/ µs DRIVEn High Output Voltage DRIVEn unloaded 9.75 10 -- V DRIVEn Low Output Voltage DRIVEn unloaded -- 0.16 0.4 V DRIVEn High Output Source Current -- 1.2 -- mA DRIVEn Low Output Sink Current -- 1.2 -- mA VIDPGOOD VTT_GMCH/CPU Rising Threshold S0 0.725 0.74 -- V VTT_GMCH/CPU Falling Threshold S0 -- 0.7 0.715 V Protection OCSET Current Source IOCSET 18 20 22 µA DDR_VTT Current Limit By Design −3.3 -- 3.3 A VDDQ OV Level S0/S3 VFB/VREF S0/S3 -- 115 -- % VDDQ UV Level VFB/VREF S0/S3 -- 75 -- % DDR_VTT OV Level VTT/VVREF_IN S0 -- 115 -- % |
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