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RT9166A-45GL Datasheet(PDF) 10 Page - Richtek Technology Corporation |
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RT9166A-45GL Datasheet(HTML) 10 Page - Richtek Technology Corporation |
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10 / 15 page  RT9166/A 10 DS9166/A-18 June 2007 www.richtek.com PCB Layout Good board layout practices must be used or instability can be induced because of ground loops and voltage drops. The input and output capacitors MUST be directly connected to the input, output, and ground pins of the device using traces which have no other currents flowing through them. The best way to do this is to layout CIN and COUT near the device with short traces to the VIN, VOUT, and ground pins. The regulator ground pin should be connected to the external circuit ground so that the regulator and its capacitors have a “single point ground”. It should be noted that stability problems have been seen in applications where “vias” to an internal ground plane were used at the ground points of the device and the input and output capacitors. This was caused by varying ground potentials at these nodes resulting from current flowing through the ground plane. Using a single point ground technique for the regulator and it’ s capacitors fixed the problem. Since high current flows through the traces going into VIN and coming from VOUT, Kelvin connect the capacitor leads to these pins so there is no voltage drop in series with the input and output capacitors. Optimum performance can only be achieved when the device is mounted on a PC board according to the diagram below : For recommended operating conditions specification of RT9166/A, where TJ(MAX) is the maximum junction temperature of the die (125 °C) and TA is the operated ambient temperature. The junction to ambient thermal resistance θJA is layout dependent. For SOT-23-3 packages, the thermal resistance θJA is 250°C/W on the standard JEDEC 51-3 single-layer thermal test board. The maximum power dissipation at TA= 25 °C can be calculated by following formula : PD (MAX) = ( 125 °C − 25°C) / 250°C/W = 0.400W for SOT-23-3 packages PD (MAX) = ( 125 °C − 25°C) / 175°C/W = 0.571W for SOT-89 packages PD (MAX) = ( 125 °C − 25°C) / 135°C/W = 0.740W for SOT-223 packages PD (MAX) = ( 125 °C − 25°C) / 68°C/W = 1.470W for TO-252 packages The maximum power dissipation depends on operating ambient temperature for fixed TJ(MAX) and thermal resistance θJA. For RT9166/A packages, Figure 1 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed. Figure 1. Derating Curves for RT9166/A Packages Figure 2. SOT-23-3 Board Layout V IN GND V OUT 0 100 200 300 400 500 600 700 800 900 1000 1100 1200 1300 1400 1500 0 25 50 75 100 125 Ambient Temperature (°C) SOT-223 SOT-89 SOT-23-3 Single Layer PCB TO-252 |
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