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RT9161-25GX Datasheet(PDF) 6 Page - Richtek Technology Corporation |
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RT9161-25GX Datasheet(HTML) 6 Page - Richtek Technology Corporation |
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6 / 10 page  RT9161/A 6 DS9161/A-31 March 2007 www.richtek.com Application Information A 10uF capacitor with 200m Ω or higher ESR, connecting between VOUT and GND pins, is recommended for stability. A capacitor with ESR smaller than 200 m Ω may cause VOUT oscillation as shown in Figure 1. Operating temperature should be well considered to ensure that the capacitance is no less than 10uF over the operating temperature range. Please take the notice that Aluminum electrolytic capacitors may cause VOUT oscillation when operating below -25 °C. The capacitance can be increased without limit for better transient response. A 1uF or higher capacitor should be placed between VIN and GND to filter out input noise and ensure stable output voltage. Figure 1 Thermal protection limits power dissipation in RT9161/A. When the operation junction temperature exceeds 165 °C, the OTP circuit starts the thermal shutdown function and turns the pass element off. The pass element turn on again after the junction temperature cools by 30 °C. For continuous operation, do not exceed absolute maximum operation junction temperature 125 °C. The power dissipation definition in device is: PD = (VIN-VOUT) x IOUT + VIN x IQ The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula: PD(MAX) = ( TJ(MAX) - TA ) / θJA Where TJ(MAX) is the maximum operation junction temperature 125 °C, TAis the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating conditions specification of RT9161/A, where TJ(MAX) is the maximum junction temperature of the die (125 °C) and TA is the maximum ambient temperature. The junction to ambient thermal resistance θJA is layout dependent. For SOT-223 packages, the thermal resistance θJA is 135°C/W on the standard JEDEC 51-3 single-layer 1S thermal test board. The maximum power dissipation at TA= 25 °C can be calculated by following formula: PD(MAX) = ( 125 °C - 25°C ) / 250 = 0.400 W for SOT-23-3 packages PD(MAX) = ( 125 °C - 25°C ) / 175 = 0.571 W for SOT-89 packages PD(MAX) = ( 125 °C - 25°C ) / 135 = 0.741 W for SOT-223 packages PD(MAX) = ( 125 °C - 25°C ) / 160 = 0.625 W for TO-92 packages The maximum power dissipation depends on operating ambient temperature for fixed TJ(MAX) and thermal resistance θJA. For RT9161/A packages, the Figure 2 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed. Region of Stable COUT ESR vs. Load Current 0.01 0.1 1 10 100 0 100 200 300 400 500 Load Current (mA) VIN = 3.3V CIN = 1uF COUT = 10uF Instable Stable Figure 2. Derating Curves 0 100 200 300 400 500 600 700 800 0 15 30 45 60 75 90 105 120 Ambient Temperature (°C) SOT-223 package TO-29 package SOT-89 package SOT-23-3 package |
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