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RT9248GC Datasheet(PDF) 11 Page - Richtek Technology Corporation |
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RT9248GC Datasheet(HTML) 11 Page - Richtek Technology Corporation |
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11 / 14 page  RT9248 Preliminary 11 DS9248-05 March 2007 www.richtek.com Design Example Given: Apply for three phase converter VIN = 12V VCORE = 1.5V ILOAD (max) = 60A VDROOP = 120mV at full load OCP trip point set at 30A for each channel (S/H) RDS(ON) = 6m Ω of low side MOSFET at 27°C L = 2 μH COUT = 9,000 μF with 2mΩ ESR. A 36 . 18 2 I A 20 L = Δ − SP DS(ON) (MAX) X R 18.36A R I × = 1. Compensation Setting a. Modulator Gain, Pole and Zero: From the following formula: Modulator Gain = = = 4.2 (12.46dB) where V RAMP : ramp amplitude of sawtooth wave LC Filter Pole = = 1.2kHz and ESR Zero = = 8.8kHz b. EA Compensation Network: Select R1 = 2.4k Ω, R2 = 24kΩ, C1 = 6.6nF, C2 = 33pF and use the type 2 compensation scheme shown in Figure 5. RAMP IN V V LC x 2 1 π For each channel the load current is 60A / 3 = 20A and the ripple current, ΔIL, is given as: The load current, I L, at S/H is . Using the following formula to select the appropriate I X (MAX) for the S/H of GM amplifier: The suggested IX is in the order of 40 to 50 μA, select RSP = RSN = 2.4k Ω, then IX (MAX) will be 45.9μA. VDROOP = 120mV = 45.9 μA × 2 × 3 (phase no.) × RADJ, therefore RADJ will be 435 Ω. The RDS(ON) of MOSFET varies with temperature rise. When the low side MOSFET working at 70 °C and 5000ppm/ °C temperature coefficient of RDS(ON), the RDS(ON) at 70 °C is given as: 6m Ω × {1+ (70°C − 27°C) × 5000ppm/°C} = 7.3mΩ. RADJ at 70 °C is given as: RADJ_27°C × (RDS(ON)_27°C / RDS(ON)_70°C) = 358Ω OCP trip point set at 30A for each channel, , RIMAX = 11.2k Ω Take the temperature rise into account, the R IMAX at 70 °C will be: R IMAX_27 °C × (RDS(ON)_27°C / RDS(ON)_70°C) = 9.2kΩ C SS = 0.1 μF is the suitable value for most application. 3.28A 12V 1.5V 1 x 2uH 1.5V x 5us = ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ − Figure 5. + - C1 FB DACOUT R3,C3 are used in type 3 compensation scheme (left NC in type 2) COMP R2 C2 C3 R3 R1 > VDIF Asymptotic Bode Plot of PWM Loop Gain -60 -40 -20 0 20 40 60 80 100 10 100 1000 10000 100000 1000000 10000000 Frequency (Hz) 10 100 1K 10K 100K 1M 10M Uncompensated EA Gain Compensated EA Gain Modulator Gain PWM Loop Gain Figure 6. 12V 3 1.9V 2 × From the following formulas: 2. Droop & DAC Offset Setting ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ + × = = 2 1 2 1 2 P 1 2 Z x R x 2 1 F , x R x 2 1 F C C C C π C π 1 2 R R Middle Band Gain = By calculation, the FZ = 1kHz, FP = 200kHz and Middle Band Gain is 10 (i.e 20dB). The asymptotic bode plot of EA compensation and PWM loop gain is shown as Figure 6. 3. Over-Current Protection Setting 4. Soft-Start Capacitor Selection IMAX SP DS(ON) X R 0.6V 1.4 R 30A R I × = × = OUT 1 2π x ESR x C |
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