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RT8010-18GQW Datasheet(PDF) 10 Page - Richtek Technology Corporation |
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RT8010-18GQW Datasheet(HTML) 10 Page - Richtek Technology Corporation |
10 / 15 page RT8010/A 10 DS8010/A-02 March 2007 www.richtek.com ⎥⎦ ⎤ ⎢⎣ ⎡ + ≤ OUT L OUT 8fC 1 ESR ΔI ΔV Applications Information The basic RT8010/A application circuit is shown in Typical Application Circuit. External component selection is determined by the maximum load current and begins with the selection of the inductor value and operating frequency followed by CIN and COUT. Inductor Selection For a given input and output voltage, the inductor value and operating frequency determine the ripple current. The ripple current ΔIL increases with higher VIN and decreases with higher inductance. Having a lower ripple current reduces the ESR losses in the output capacitors and the output voltage ripple. Highest efficiency operation is achieved at low frequency with small ripple current. This, however, requires a large inductor. A reasonable starting point for selecting the ripple current is ΔIL = 0.4(IMAX). The largest ripple current occurs at the highest VIN. To guarantee that the ripple current stays below a specified maximum, the inductor value should be chosen according to the following equation : Inductor Core Selection Once the value for L is known, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite or mollypermalloy cores. Actual core loss is independent of core size for a fixed inductor value but it is very dependent on the inductance selected. As the inductance increases, core losses decrease. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates “hard”, which means that inductance collapses abruptly when the peak design ⎥⎦ ⎤ ⎢⎣ ⎡ − × ⎥⎦ ⎤ ⎢⎣ ⎡ × = IN OUT OUT L V V 1 L f V ΔI ⎥ ⎦ ⎤ ⎢ ⎣ ⎡ − × ⎥⎦ ⎤ ⎢⎣ ⎡ Δ × = IN(MAX) OUT L(MAX) OUT V V 1 I f V L current is exceeded. This results in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! Different core materials and shapes will change the size/ current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don't radiate energy but generally cost more than powdered iron core inductors with similar characteristics. The choice of which style inductor to use mainly depends on the price vs size requirements and any radiated field/EMI requirements. CIN and COUT Selection The input capacitance, CIN, is needed to filter the trapezoidal current at the source of the top MOSFET. To prevent large ripple voltage, a low ESR input capacitor sized for the maximum RMS current should be used. RMS current is given by : 1 V V V V I I OUT IN IN OUT OUT(MAX) RMS − = This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. The selection of COUT is determined by the effective series resistance (ESR) that is required to minimize voltage ripple and load step transients, as well as the amount of bulk capacitance that is necessary to ensure that the control loop is stable. Loop stability can be checked by viewing the load transient response as described in a later section. The output ripple, ΔVOUT, is determined by : |
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