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HE83R125 Datasheet(PDF) 7 Page - King blillion Electronics Co.,Ltd. |
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HE83R125 Datasheet(HTML) 7 Page - King blillion Electronics Co.,Ltd. |
7 / 18 page King Billion Electronics Co., Ltd 駿 億 電 子 股 份 有 限 公 司 HE83R125 HE80000 Series March 13, 2003 7 V1.0E This specification is subject to change without notice. Please contact sales person for the latest version before use. LVF pads. LV4 LV3 LV2 LV1 LVF LC2 LC1 104 0.1uF R 0.1uF 0.1uF 0.1uF With the regulated LCD power, the LCD display can give steady visual effect over a wide range of operating voltage. The built-in regulator must be enabled by mask option MO_ LVRG to function. MO_LVRG Function 0 Disable LCD regulator 1 Enable LCD regulator Please note that to emulate the visual effect of 1/4 bias on the ICE 3.X version the LR2 and LR3 on the top board need be shorted. 6. LCDC Control register LCD Control Register LCDC controls the functions of LCD driver; such as contrast level, LCD waveform type, On/Off, Blank, etc. LCDC bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 - - - - - TYPE BLANK LCDE Field Value Function TYPE 0 Select Type A LCD waveform 1 Select Type B LCD waveform BLANK 0 Normal display 1 LCD display blanked. LCD driver changes only COM output signal, SEG signal remains unchanged. LCDE 0 LCD driver disabled, LCD driver has no output signal. 1 LCD driver Enabled Please note that LCD driver must be turned off before the entering sleep mode. That means user must clear the bit 0 of LCDC to turn off LCD driving circuit before setting bit 6 of OP1 to enter sleep mode. Large current might happen if the procedure is not followed. Please also note that LCD driver uses slow clock as clock source. The LCD display will not display normally if it works in Fast clock only mode because the LCD refresh action is too fast. |
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