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TMDS251PAGRG4 Datasheet(PDF) 8 Page - Texas Instruments |
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TMDS251PAGRG4 Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 27 page  www.ti.com ELECTRICAL CHARACTERISTICS TMDS251 SLLS852 – AUGUST 2007 RECOMMENDED OPERATING CONDITIONS (continued) MIN NOM MAX UNIT TA Operating free-air temperature 0 70 °C TMDS DIFFERENTIAL PINS VIC Input common mode voltage VCC–0.4 VCC+0.01 V VID Receiver peak-to-peak differential input voltage 150 1560 mVp-p RVSADJ Resistor for TMDS compliant voltage swing range 3.66 4.02 4.47 k Ω AVCC TMDS output termination voltage, see Figure 1 3 3.3 3.6 V RT Termination resistance, see Figure 1 45 50 55 Ω Signaling rate 0 2.5 Gbps CONTROL PINS VIH LVTTL High-level input voltage 2 VCC V VIL LVTTL Low-level input voltage GND 0.8 V DDC I/O PINS VI(DDC) DDC Input voltage GND VDD V STATUS and SOURCE SELECTOR PINS VIH LVTTL High-level input voltage 2 VDD V VIL LVTTL Low-level input voltage GND 0.8 V over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT VIH = VCC, VIL = VCC – 0.6 V, S1/S2 = RT = 50 Ω, AVCC = 3.3 V Low/Low, 176 200 Am/Bm(2:4) = 2.5 Gbps HDMI data Low/High, ICC Supply current mA pattern High/High Am/Bm(1) = 250 MHz clock S1/S2 = 8 20 High/Low VIH = VCC, VIL = VCC – 0.6 V, RT = 50 Ω, AVCC = 3.3 V IDD Power supply current, 5-V 2 5 mA Am/Bm(2:4) = 2.5 Gbps HDMI data pattern Am/Bm(1) = 250 MHz clock TMDS DIFFERENTIAL PINS VOH Single-ended high-level output voltage AVCC–10 AVCC+10 mV VOL Single-ended low-level output voltage AVCC–600 AVCC–400 mV Vswing Single-ended output swing voltage 400 600 mV See Figure 2, AVCC = 3.3 V, VOD(O) Overshoot of output differential voltage 15% 2 × V swing RT = 50 Ω VOD(U) Undershoot of output differential voltage 25% 2 × V swing Change in steady-state common-mode ΔVOC(SS) 5 mV output voltage between logic states I(OS) Short circuit output current See Figure 3 -12 12 mA Single-ended input voltage under high VI(open) II = 10 µA VCC–10 VCC+10 mV impedance input or open input RINT Input termination resistance VIN = 2.9 V 45 50 55 Ω CONTROL PINS IIH High-level digital input current(2) VIH = 2 V or VCC -10 10 µA IIL Low-level digital input current(2) VIL = GND or 0.8 V -10 10 µA DDC I/O PINS Ilkg Input leakage current VI = 0.1 VDD to 0.9 VDD to isolated DDC inputs -10 10 µA CIO Input/output capacitance VI(pp) = 1 V, 100 kHz 10 pF RON Switch resistance IO = 3 mA, VO = 0.4 V 27 40 Ω VPASS Switch output voltage VI = 5 V, IO = 100 µA 2.4 2.7 V STATUS AND SOURCE SELECTOR PINS (1) All typical values are at 25 °C and with a 3.3-V supply. (2) IIH and IIL specifications are not applicable to the VSADJ pin. 8 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TMDS251 |
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