HYB18TC256160BF-3.7 datasheet(9/62 Pages) QIMONDA

Part #	HYB18TC256160BF-3.7

Description	256-Mbit Double-Data-Rate-Two SDRAM

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Manufacturer	QIMONDA [Qimonda AG]

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Internet Data Sheet

Rev. 1.3, 2007-05

9

07182006-DD60-22E6

HYB18TC256[80/16]0BF

256-Mbit Double-Data-Rate-Two SDRAM

FIGURE 1

Chip Configuration for

×8 components, PG-TFBGA-60 (top view)

Notes

1. RDQS / RDQS are enabled by EMRS(1) command.

2. If RDQS / RDQS is enabled, the DM function is disabled

3. When enabled, RDQS & RDQS are used as strobe signals during reads.

4.

V

DDL and VSSDL are power and ground for the DLL. VDDL is connected to VDD on the device. VDD, VDDQ, VSSDL, VSS, and VSSQ

are isolated on the device.

5. Ball position L8 is A13 for 512-Mbit and is Not Connected on 256-Mbit.

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