We Listen to Your Comments

Any information within this document that you feel is wrong, unclear or missing at all?

Your feedback will help us to continuously improve the quality of this document.

Please send your proposal (including a reference to this document) to:

techdoc@qimonda.com

Internet Data Sheet

HY[B/I]39S256[40/80/16][0/7]F[E/T/F](L)

256-MBit Synchronous DRAM

qag_techdoc_rev400 / 3.2 QAG / 2006-08-07

2

03292006-TMTK-JFEU

HY[B/I]39S256[40/80/16]0FT(L), HY[B/I]39S256[40/80/16]0FE(L), HYB39S256[40/80/16]0FF(L), HYB39S256407FE

Revision History: 2007-09, Rev. 1.42

Page

Subjects (major changes since last revision)

All

Adapted internet edition

7

Corrected SDRAM organization for x4 in Table 4

Previous Revision: 2007-09, Rev. 1.41

All

Editorial Change

4

Corrected HYB39S256407FF-7 to HYP39S256407FE-7

Previous Revision: 2007-04, Rev. 1.40

4

Corrected HYB39S256400FE-7 to HYB39S256400FF-7

Previous Revision: 2007-03, Rev. 1.30